[Nvidia] Fix qos sai test for supporting LAG port #9587
[Nvidia] Fix qos sai test for supporting LAG port #9587bingwang-ms merged 4 commits intosonic-net:masterfrom
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Thanks for the improvement! The code looks good to me. |
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@stephenxs Can you resolve the conflict? |
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Hi @bingwang-ms , the conflict has been resolved. Can you help merge it? |
1. Because the method to block port is replaced by blocking queue, on the SN5600 platform, the first packet will leak, so update the case accordingly. 2. Because the method to block port is replaced by blocking queue, On dualtor devices, data plane has been blocked, but control plane still can work, so the old implementation will view the control plane packets as leaked packets. Actually, the leaked packet number is 0.
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@JibinBao PR conflicts with 202205 branch |
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@JibinBao Can you please fix the conflict for |
Ok, will do |
Description of PR Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices.
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Cherry-pick PR to 202305: #9996 |
Description of PR Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices.
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@JibinBao Can you please file a new PR for 202205 branch? I saw the test cases are still skipped in 202205 branch. Thanks! |
@bingwang-ms , After testing psss on 202205, I will open one new PR for 202205. |
Description of PR Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices. Change-Id: I6580398b6038e6a850915c57dc6112cdb628ed99
Description of PR Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices. Change-Id: I6580398b6038e6a850915c57dc6112cdb628ed99
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| # LAG ports in T1 TOPO need to be removed in Mellanox devices | ||
| if topo in self.SUPPORTED_T0_TOPOS or isMellanoxDevice(src_dut): | ||
| if topo in self.SUPPORTED_T0_TOPOS or (topo in self.SUPPORTED_PTF_TOPOS and isMellanoxDevice(src_dut)): |
There was a problem hiding this comment.
In the past, t0-120 topo was correctly processed because it is mellanox device.
Now, since t0-120 is not in ptf_topo, need to add t0-120 topo to SUPPORTED_T0_TOPOS.
please help to review PR #10200
Description of PR Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices.
Description of PR
Previously, on Nvidia devices, to make port congestion, we disable the port. So, if a LAG port is used as the tx port in the test, the LAG port will go down in 90s because the lacp pdus are also blocked, which will fail the tests. Therefore, we skip the test on the LAG port for QoS tests. Currently, to make the LAG port also support QoS test, we block the data plane queue instead of disabling the port. This change will work for all topo on Nvidia devices.
Summary:
Fixes # (issue)
Type of change
Back port request
Approach
What is the motivation for this PR?
Make Qos sai test support LAG port
How did you do it?
we block the data plane queue instead of disabling the port. So the control plane still work normally.
How did you verify/test it?
Run qos sai test on t1-lag-64 topo
Any platform specific information?
Any
Supported testbed topology if it's a new test case?
Any
Documentation