Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
13 changes: 8 additions & 5 deletions common/include/RevCommon.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
#include <functional>
#include <ostream>
#include <type_traits>
#include <utility>

#ifndef _REV_NUM_REGS_
#define _REV_NUM_REGS_ 32
Expand Down Expand Up @@ -90,20 +91,22 @@ inline uint64_t make_lsq_hash(uint16_t destReg, RevRegClass regType, unsigned Ha

struct MemReq{
MemReq() = default;
MemReq(const MemReq&) = default;
MemReq& operator=(const MemReq&) = default;
~MemReq() = default;

MemReq(uint64_t addr, uint16_t dest, RevRegClass regclass,
unsigned hart, MemOp req, bool outstanding, std::function<void(MemReq)> func) :
Addr(addr), DestReg(dest), RegType(regclass), Hart(hart),
ReqType(req), isOutstanding(outstanding), MarkLoadComplete(func)
ReqType(req), isOutstanding(outstanding), MarkLoadComplete(std::move(func))
{
}

void Set(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart, MemOp req, bool outstanding,
std::function<void(MemReq)> func)
void Set(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart,
MemOp req, bool outstanding, std::function<void(MemReq)> func)
{
Addr = addr; DestReg = dest; RegType = regclass; Hart = hart;
ReqType = req; isOutstanding = outstanding;
MarkLoadComplete = func;
ReqType = req; isOutstanding = outstanding; MarkLoadComplete = std::move(func);
}

uint64_t Addr = _INVALID_ADDR_;
Expand Down
3 changes: 1 addition & 2 deletions include/RevHart.h
Original file line number Diff line number Diff line change
Expand Up @@ -42,8 +42,7 @@ class RevHart{
///< RevHart: Constructor
RevHart(unsigned ID, const std::shared_ptr<std::unordered_map<uint64_t, MemReq>>& LSQueue,
std::function<void(const MemReq&)> MarkLoadCompleteFunc)
: ID(ID), LSQueue(LSQueue), MarkLoadCompleteFunc(MarkLoadCompleteFunc) {}

: ID(ID), LSQueue(LSQueue), MarkLoadCompleteFunc(std::move(MarkLoadCompleteFunc)) {}

///< RevHart: Destructor
~RevHart() = default;
Expand Down
5 changes: 3 additions & 2 deletions include/RevInstHelpers.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,13 +77,14 @@ bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
MemOp::MemOpREAD,
true,
R->GetMarkLoadComplete());
R->LSQueueInsert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req});
R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req});
M->ReadVal(F->GetHartToExecID(),
rs1 + Inst.ImmSignExt(12),
reinterpret_cast<std::make_unsigned_t<T>*>(&R->RV32[Inst.rd]),
req,
flags);
R->SetX(Inst.rd, static_cast<T>(R->RV32[Inst.rd]));

}else{
static constexpr RevFlag flags = sizeof(T) < sizeof(int64_t) ?
std::is_signed_v<T> ? RevFlag::F_SEXT64 : RevFlag::F_ZEXT64 : RevFlag::F_NONE;
Expand All @@ -94,7 +95,7 @@ bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
MemOp::MemOpREAD,
true,
R->GetMarkLoadComplete());
R->LSQueueInsert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req});
R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req});
M->ReadVal(F->GetHartToExecID(),
rs1 + Inst.ImmSignExt(12),
reinterpret_cast<std::make_unsigned_t<T>*>(&R->RV64[Inst.rd]),
Expand Down
5 changes: 0 additions & 5 deletions include/RevRegFile.h
Original file line number Diff line number Diff line change
Expand Up @@ -176,11 +176,6 @@ class RevRegFile {
/// Set the current tracer
void SetTracer(RevTracer *t) { Tracer = t; }

/// Insert an item in the Load/Store Queue
void LSQueueInsert(std::pair<uint64_t, MemReq> item){
LSQueue->insert(std::move(item));
}

/// Get the MarkLoadComplete function
const std::function<void(const MemReq&)>& GetMarkLoadComplete() const {
return MarkLoadCompleteFunc;
Expand Down
12 changes: 6 additions & 6 deletions include/insns/RV32D.h
Original file line number Diff line number Diff line change
Expand Up @@ -25,30 +25,30 @@ class RV32D : public RevExt{
static bool cfldsp(RevFeature *F, RevRegFile *R,
RevMem *M, RevInst Inst) {
// c.flwsp rd, $imm = lw rd, x2, $imm
Inst.rs1 = 2;
// Inst.rs1 = 2; //Removed - set in decode
return fld(F, R, M, Inst);
}

static bool cfsdsp(RevFeature *F, RevRegFile *R,
RevMem *M, RevInst Inst) {
// c.fsdsp rs2, $imm = fsd rs2, x2, $imm
Inst.rs1 = 2;
//Inst.rs1 = 2; //Removed - set in decode
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Should this be removed? Or will keeping it commented help users understand the changes

return fsd(F, R, M, Inst);
}

static bool cfld(RevFeature *F, RevRegFile *R,
RevMem *M, RevInst Inst) {
// c.fld %rd, %rs1, $imm = flw %rd, %rs1, $imm
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
// Inst.rd = CRegIdx(Inst.rd); //Removed - Scaled in decode
// Inst.rs1 = CRegIdx(Inst.rs1); // Removed - scaled in decode
return fld(F, R, M, Inst);
}

static bool cfsd(RevFeature *F, RevRegFile *R,
RevMem *M, RevInst Inst) {
// c.fsd rs2, rs1, $imm = fsd rs2, $imm(rs1)
Inst.rs2 = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
// Inst.rs2 = CRegIdx(Inst.rd); //Removed - scaled in decode
// Inst.rs1 = CRegIdx(Inst.rs1); // Removed - scaled in decode
return fsd(F, R, M, Inst);
}

Expand Down
12 changes: 6 additions & 6 deletions include/insns/RV32F.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,27 +24,27 @@ class RV32F : public RevExt{
// Compressed instructions
static bool cflwsp(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.flwsp rd, $imm = lw rd, x2, $imm
Inst.rs1 = 2;
// Inst.rs1 = 2; //Removed - set in decode
return flw(F, R, M, Inst);
}

static bool cfswsp(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.swsp rs2, $imm = sw rs2, x2, $imm
Inst.rs1 = 2;
// Inst.rs1 = 2; //Removed - set in decode
return fsw(F, R, M, Inst);
}

static bool cflw(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.flw %rd, %rs1, $imm = flw %rd, %rs1, $imm
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
// Inst.rd = CRegIdx(Inst.rd); //Removed - set in decode
// Inst.rs1 = CRegIdx(Inst.rs1); // Removed - set in decode
return flw(F, R, M, Inst);
}

static bool cfsw(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.fsw rs2, rs1, $imm = fsw rs2, $imm(rs1)
Inst.rs2 = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
//Inst.rs2 = CRegIdx(Inst.rd); //Removed - set in decode
//Inst.rs1 = CRegIdx(Inst.rs1); //Removed - set in decode
return fsw(F, R, M, Inst);
}

Expand Down
68 changes: 34 additions & 34 deletions include/insns/RV32I.h
Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,8 @@ class RV32I : public RevExt {
// Compressed instructions
static bool caddi4spn(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.addi4spn rd, $imm == addi rd, x2, $imm
Inst.rs1 = 2;
Inst.rd = CRegIdx(Inst.rd);
//Inst.rs1 = 2; //Removed - Set in Decode
//Inst.rd = CRegIdx(Inst.rd); //Set in Decode

// if Inst.imm == 0; this is a HINT instruction
// this is effectively a NOP
Expand All @@ -41,7 +41,7 @@ class RV32I : public RevExt {

static bool clwsp(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.lwsp rd, $imm = lw rd, x2, $imm
Inst.rs1 = 2;
//Inst.rs1 = 2; //Removed - set in decode
//Inst.imm = ((Inst.imm & 0b111111)*4);
Inst.imm = (Inst.imm & 0b11111111); // Immd is 8 bits - bits placed correctly in decode, no need to scale

Expand All @@ -50,7 +50,7 @@ class RV32I : public RevExt {

static bool cswsp(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.swsp rs2, $imm = sw rs2, x2, $imm
Inst.rs1 = 2;
//Inst.rs1 = 2; //Removed - set in decode
//Inst.imm = ((Inst.imm & 0b111111)*4);
Inst.imm = (Inst.imm & 0b11111111); // Immd is 8 bits - zero extended, bits placed correctly in decode, no need to scale

Expand All @@ -59,8 +59,8 @@ class RV32I : public RevExt {

static bool clw(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.lw rd, rs1, $imm = lw rd, $imm(rs1)
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
//Inst.rd = CRegIdx(Inst.rd); //Removed - Scaled in decode
//Inst.rs1 = CRegIdx(Inst.rs1); //Removed - Scaled in decode
//Inst.imm = ((Inst.imm & 0b11111)*4);
Inst.imm = (Inst.imm & 0b1111111); // Immd is 7 bits, zero extended, bits placed correctly in decode, no need to scale

Expand All @@ -69,8 +69,8 @@ class RV32I : public RevExt {

static bool csw(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.sw rs2, rs1, $imm = sw rs2, $imm(rs1)
Inst.rs2 = CRegIdx(Inst.rd);
Inst.rs1 = CRegIdx(Inst.rs1);
//Inst.rs2 = CRegIdx(Inst.rd); //Removed - Scaled in Decode
//Inst.rs1 = CRegIdx(Inst.rs1); //Removed - Scaled in Decode
//Inst.imm = ((Inst.imm & 0b11111)*4);
Inst.imm = (Inst.imm & 0b1111111); //Immd is 7-bits, zero extended, bits placed correctly in decode, no need to scale

Expand All @@ -88,7 +88,7 @@ class RV32I : public RevExt {

static bool cjal(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.jal $imm = jal x0, $imm
Inst.rd = 1; // x1
//Inst.rd = 1; // x1 //Removed - set in decode
Inst.imm = Inst.jumpTarget;

return jal(F, R, M, Inst);
Expand Down Expand Up @@ -119,7 +119,7 @@ class RV32I : public RevExt {
}

static bool cmv(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
Inst.rs1 = 0; // expands to add rd, x0, rs2, so force rs1 to zero
//Inst.rs1 = 0; //Removed - performed in decode // expands to add rd, x0, rs2, so force rs1 to zero
return add(F, R, M, Inst);
}

Expand All @@ -137,7 +137,7 @@ class RV32I : public RevExt {
static bool cbeqz(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.beqz %rs1, $imm = beq %rs1, x0, $imm
Inst.rs2 = 0;
Inst.rs1 = CRegIdx(Inst.rs1);
// Inst.rs1 = CRegIdx(Inst.rs1); // removed - scaled in decode
Inst.imm = Inst.offset;
Inst.imm = Inst.ImmSignExt(9);
//Inst.imm = Inst.offset & 0b111111;
Expand All @@ -149,8 +149,8 @@ class RV32I : public RevExt {

static bool cbnez(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.bnez %rs1, $imm = bne %rs1, x0, $imm
Inst.rs2 = 0;
Inst.rs1 = CRegIdx(Inst.rs1);
//Inst.rs2 = 0; //removed - set in decode
// Inst.rs1 = CRegIdx(Inst.rs1); //removed - scaled in decode
Inst.imm = Inst.offset;
Inst.imm = Inst.ImmSignExt(9); //Immd is signed 9-bit, scaled in decode
//Inst.imm = Inst.offset & 0b111111;
Expand All @@ -162,7 +162,7 @@ class RV32I : public RevExt {

static bool cli(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.li %rd, $imm = addi %rd, x0, $imm
Inst.rs1 = 0;
//Inst.rs1 = 0; //removed - set in decode
// SEXT(Inst.imm, (Inst.imm & 0b111111), 6);
Inst.imm = Inst.ImmSignExt(6);
return addi(F, R, M, Inst);
Expand All @@ -178,7 +178,7 @@ class RV32I : public RevExt {
return addi(F, R, M, Inst);
}else{
// c.lui %rd, $imm = addi %rd, x0, $imm
Inst.imm = Inst.ImmSignExt(6);
Inst.imm = Inst.ImmSignExt(17);
return lui(F, R, M, Inst);
}
}
Expand All @@ -187,67 +187,67 @@ class RV32I : public RevExt {
// c.addi %rd, $imm = addi %rd, %rd, $imm
// uint32_t tmp = Inst.imm & 0b111111;
Inst.imm = Inst.ImmSignExt(6);
Inst.rs1 = Inst.rd;
//Inst.rs1 = Inst.rd; //Removed, set in decode
return addi(F, R, M, Inst);
}

static bool cslli(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.slli %rd, $imm = slli %rd, %rd, $imm
Inst.rs1 = Inst.rd;
// Inst.rs1 = Inst.rd; //removed - set in decode
return slli(F, R, M, Inst);
}

static bool csrli(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.srli %rd, $imm = srli %rd, %rd, $imm
Inst.rd = CRegIdx(Inst.rd);
//Inst.rd = CRegIdx(Inst.rd); //removed - set in decode
Inst.rs1 = Inst.rd;
return srli(F, R, M, Inst);
}

static bool csrai(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.srai %rd, $imm = srai %rd, %rd, $imm
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
// Inst.rd = CRegIdx(Inst.rd); //removed - set in decode
// Inst.rs1 = Inst.rd; //Removed - set in decode
return srai(F, R, M, Inst);
}

static bool candi(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.andi %rd, $imm = sandi %rd, %rd, $imm
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
// Inst.rd = CRegIdx(Inst.rd); //removed - scaled in decode
// Inst.rs1 = Inst.rd; //removed - set in decode
Inst.imm = Inst.ImmSignExt(6); //immd is 6 bits, sign extended no scaling needed
return andi(F, R, M, Inst);
}

static bool cand(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.and %rd, %rs2 = and %rd, %rd, %rs2
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
Inst.rs2 = CRegIdx(Inst.rs2);
// Inst.rd = CRegIdx(Inst.rd);//removed - scaled in decode
// Inst.rs1 = Inst.rd;//removed - scaled in decode
// Inst.rs2 = CRegIdx(Inst.rs2);//removed - scaled in decode
return f_and(F, R, M, Inst);
}

static bool cor(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.or %rd, %rs2 = or %rd, %rd, %rs2
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
Inst.rs2 = CRegIdx(Inst.rs2);
//Inst.rd = CRegIdx(Inst.rd);//removed - scaled in decode
//Inst.rs1 = Inst.rd;//removed - scaled in decode
//Inst.rs2 = CRegIdx(Inst.rs2);//removed - scaled in decode
return f_or(F, R, M, Inst);
}

static bool cxor(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.xor %rd, %rs2 = xor %rd, %rd, %rs2
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
Inst.rs2 = CRegIdx(Inst.rs2);
//Inst.rd = CRegIdx(Inst.rd);//removed - scaled in decode
//Inst.rs1 = Inst.rd;//removed - scaled in decode
//Inst.rs2 = CRegIdx(Inst.rs2);//removed - scaled in decode
return f_xor(F, R, M, Inst);
}

static bool csub(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) {
// c.sub %rd, %rs2 = sub %rd, %rd, %rs2
Inst.rd = CRegIdx(Inst.rd);
Inst.rs1 = Inst.rd;
Inst.rs2 = CRegIdx(Inst.rs2);
//Inst.rd = CRegIdx(Inst.rd);//removed - scaled in decode
//Inst.rs1 = Inst.rd;//removed - scaled in decode
//Inst.rs2 = CRegIdx(Inst.rs2);//removed - scaled in decode
return sub(F, R, M, Inst);
}

Expand Down
Loading