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To provide better compatibility with the RV toolchain all RV64 tests now build with RV64GC. To get all tests to pass two changes were required:

  1. The prefetcher was not always properly accounting for 16-bit instructions. This was a single condition added to the IsAvail() function. I also removed some unnecessary recursion in the Fill() function.

  2. Compressed instructions had their source and destination registers modified at execution time. This causes issues with Dependency check and LS queue as the registers used to Set/Clear are off by 8, or sometimes not set at all. All these modifications that were previously done at execute time are now incorporated into the Decode() function. This means that the RevInst has the correct source and destination registers after decode

@donofrio donofrio requested review from jleidel and rkabrick November 11, 2023 03:02
@donofrio donofrio marked this pull request as draft November 11, 2023 21:27
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This is inducing:

  • an exception in big_loop
  • segfault on memset_2

@donofrio donofrio marked this pull request as ready for review November 30, 2023 19:54
@donofrio donofrio requested a review from leekillough November 30, 2023 19:54
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All tests are now passing! Many thanks to all - especially @leekillough for their help getting this across the line

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Nothing earth shattering in my comments. Take it or leave it.

Get this MERGED

req,
flags);
R->SetX(Inst.rd, static_cast<T>(R->RV64[Inst.rd]));
std::cout << "RMT: Load Issued for address: " << std::hex << req.Addr << " Data: " << static_cast<T>(R->RV64[Inst.rd]) << std::dec << " Dest Reg: " << req.DestReg << std::endl;
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Should these cout calls be output->verbose ?

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spurious dead code... removing

RevMem *M, RevInst Inst) {
// c.fsdsp rs2, $imm = fsd rs2, x2, $imm
Inst.rs1 = 2;
//Inst.rs1 = 2; //Removed - set in decode
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Should this be removed? Or will keeping it commented help users understand the changes

splitLine = line.strip().split(":")
PC = splitLine[0]
if "<_start>:" in line:
if "<main>:" in line:
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We talked in person about making this modular based on the startAddr passed in the config

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ah - yes, that is a good idea, I'll fix that in a separate commit

return;
}
// If address is not 32bit aligned... then make it aligned
Addr &= 0xFFFFFFFFFFFFFFFC;
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I think you can do this Addr &= ~0x3;

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5 participants