Add new HWSKU for marvell-teralynx#20952
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wangxin merged 1 commit intosonic-net:masterfrom Dec 12, 2025
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Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com>
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Dec 12, 2025
echuawu
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Dec 12, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com>
saravanan-nexthop
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Dec 15, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Saravanan <saravanan@nexthop.ai>
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Dec 16, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Guy Shemesh <gshemesh@nvidia.com>
AharonMalkin
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Dec 16, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Aharon Malkin <amalkin@nvidia.com>
nissampa
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Dec 16, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Nishanth Sampath Kumar <nissampa@cisco.com>
selldinesh
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Dec 18, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: selldinesh <dinesh.sellappan@keysight.com>
gshemesh2
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Dec 21, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Guy Shemesh <gshemesh@nvidia.com>
gshemesh2
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Dec 21, 2025
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Guy Shemesh <gshemesh@nvidia.com>
vrajeshe
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Jan 4, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Venkata Gouri Rajesh Etla <vrajeshe@cisco.com>
venu-nexthop
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Jan 13, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com>
yifan-nexthop
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Jan 14, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: YiFan Wang <yifan@nexthop.ai>
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Jan 21, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Priyansh Tratiya <ptratiya@microsoft.com>
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Jan 28, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Lakshmi Yarramaneni <lakshmi@nexthop.ai>
ytzur1
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Feb 2, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Yael Tzur <ytzur@nvidia.com>
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This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com>
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This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Raghavendran Ramanathan <rraghav@cisco.com>
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Feb 18, 2026
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: mssonicbld <sonicbld@microsoft.com>
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This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: mssonicbld <sonicbld@microsoft.com>
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This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Zhuohui Tan <zhuohui.tan@amd.com>
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This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC. What is the motivation for this PR? The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989. How did you do it? How did you verify/test it? Ran the SONIC PTF test suite for the new hwsku Any platform specific information? Applicable only for marvell-teralynx platform. Supported testbed topology if it's a new test case? T0 and T1 Signed-off-by: Anandhi Dhanabalan <adhanabalan@marvell.com> Signed-off-by: Abhishek <abhishek@nexthop.ai>
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Description of PR
This PR introduces the new HWSKU dbmvtx9180_64osfp_128x400G_lab for the Marvell Teralynx ASIC.
Type of change
Back port request
Approach
What is the motivation for this PR?
The purpose of this PR is to extend sonic-mgmt support for the HWSKU dbmvtx9180_64osfp_128x400G_lab, introduced through sonic-net/sonic-buildimage#23989.
How did you do it?
How did you verify/test it?
Ran the SONIC PTF test suite for the new hwsku
Any platform specific information?
Applicable only for marvell-teralynx platform.
Supported testbed topology if it's a new test case?
T0 and T1