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cisco-8000: set 512bit time to a longer duration for cisco-8000 pfcwd tests using pfc_gen.py #16159
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,79 @@ | ||
| # Verified on Q200 @ 100G port speed. e.g. 687 is bit time to pause for 50ms (clock at 900Mhz). | ||
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| def get_ifg_reg_list(slice_idx): | ||
| ''' Gr2 does not have an ifg list, listify ''' | ||
| if is_graphene2: # noqa: F821 | ||
| ifg_root = [tree.slice[slice_idx].ifg] # noqa: F821 | ||
| else: | ||
| ifg_root = tree.slice[slice_idx].ifg # noqa: F821 | ||
| return ifg_root | ||
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| def get_ifgb(ifg_root): | ||
| ''' Complex tree register differences for ifgb per asic. | ||
| Takes tree.slice[slice_idx].ifg[ifg_idx] ''' | ||
| if is_graphene2: # noqa: F821 | ||
| ifgb = ifg_root.ifgbe_ra | ||
| elif is_gr: # noqa: F821 | ||
| ifgb = ifg_root.ifgbe_mac | ||
| else: | ||
| ifgb = ifg_root.ifgb | ||
| return ifgb | ||
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| def set_pfc_512bit_time(interface, bit_time, num_serdes_lanes): | ||
| sai_lane = port_to_sai_lane_map[interface] # noqa: F821 | ||
| slice_idx, ifg_idx, serdes_idx = sai_lane_to_slice_ifg_pif(sai_lane) # noqa: F821 | ||
| for i in range(num_serdes_lanes): | ||
| ifg_root = get_ifg_reg_list(slice_idx)[ifg_idx] | ||
| ifg_mac = get_ifgb(ifg_root) | ||
| regval = dd0.read_register(ifg_mac.fc_port_cfg0[serdes_idx + i]) # noqa: F821 | ||
| regval.port_512bit_time = bit_time | ||
| dd0.write_register(ifg_mac.fc_port_cfg0[serdes_idx + i], regval) # noqa: F821 | ||
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| def compute_fractional_512bit_value(mac_freq_khz, port_gbps): | ||
| ''' For G100 and G200 ''' | ||
| cycles_per_512bits = 512.0 * (mac_freq_khz / 1000000.) / port_gbps | ||
| print("Cycles per 512bits: {}".format(cycles_per_512bits)) | ||
| int_part = int(cycles_per_512bits) | ||
| float_part = cycles_per_512bits - int_part | ||
| print("Integer: {}".format(int_part)) | ||
| print("Fraction: {}".format(float_part)) | ||
| bit_time = (int_part << 10) + int(float_part * 1024) | ||
| return bit_time | ||
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| bit_time = None | ||
| if is_pac or is_gb: # noqa: F821 | ||
| bit_time = 5 | ||
| elif is_gr or is_graphene2: # noqa: F821 | ||
| mac_freq_khz = d0.get_int_property(sdk.la_device_property_e_MAC_FREQUENCY) # noqa: F821 | ||
| print("Mac frequency khz: {}".format(mac_freq_khz)) | ||
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| mac_port = get_mac_port(INTERFACE) # noqa: F821 | ||
| mac_port_speed_enum_val = mac_port.get_speed() | ||
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| # Find matching speed enum | ||
| speed = None | ||
| for field in dir(mac_port): | ||
| starter_str = "port_speed_e_E_" | ||
| if field.startswith(starter_str): | ||
| poss_speed_enum_val = getattr(mac_port, field) | ||
| if mac_port_speed_enum_val == poss_speed_enum_val: | ||
| speed = field[len(starter_str):] | ||
| break | ||
| assert speed is not None, "Failed to find matching speed for mac port enum value {}".format(mac_port_speed_enum_val) | ||
| print("Speed string: {}".format(speed)) | ||
| assert speed[-1] == "G", "Unexpected speed, expected trailing 'G'" | ||
| gbps_str = speed[:-1] | ||
| assert gbps_str.isdigit(), "Non-digit speed {}".format(gbps_str) | ||
| gbps = int(gbps_str) | ||
| print("Port speed gbps: {}".format(gbps)) | ||
| bit_time = compute_fractional_512bit_value(mac_freq_khz, gbps) | ||
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| assert bit_time is not None, "Failed to find an appropriate 512bit time on this device" | ||
| print("Setting 512bit register to normal value {}".format(bit_time)) | ||
| set_pfc_512bit_time("INTERFACE", bit_time, 1) | ||
| print("Done") |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,70 @@ | ||
| # Verified on Q200 @ 100G port speed. e.g. 687 is bit time to pause for 50ms (clock at 900Mhz). | ||
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| import math | ||
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| def get_ifg_reg_list(slice_idx): | ||
| ''' Gr2 does not have an ifg list, listify ''' | ||
| if is_graphene2: # noqa: F821 | ||
| ifg_root = [tree.slice[slice_idx].ifg] # noqa: F821 | ||
| else: | ||
| ifg_root = tree.slice[slice_idx].ifg # noqa: F821 | ||
| return ifg_root | ||
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| def get_ifgb(ifg_root): | ||
| ''' Complex tree register differences for ifgb per asic. | ||
| Takes tree.slice[slice_idx].ifg[ifg_idx] ''' | ||
| if is_graphene2: # noqa: F821 | ||
| ifgb = ifg_root.ifgbe_ra | ||
| elif is_gr: # noqa: F821 | ||
| ifgb = ifg_root.ifgbe_mac | ||
| else: | ||
| ifgb = ifg_root.ifgb | ||
| return ifgb | ||
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| def set_pfc_512bit_time(interface, bit_time, num_serdes_lanes): | ||
| sai_lane = port_to_sai_lane_map[interface] # noqa: F821 | ||
| slice_idx, ifg_idx, serdes_idx = sai_lane_to_slice_ifg_pif(sai_lane) # noqa: F821 | ||
| for i in range(num_serdes_lanes): | ||
| ifg_root = get_ifg_reg_list(slice_idx)[ifg_idx] | ||
| ifg_mac = get_ifgb(ifg_root) | ||
| regval = dd0.read_register(ifg_mac.fc_port_cfg0[serdes_idx + i]) # noqa: F821 | ||
| regval.port_512bit_time = bit_time | ||
| dd0.write_register(ifg_mac.fc_port_cfg0[serdes_idx + i], regval) # noqa: F821 | ||
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| def set_pfc512_bit_sec(interface, time_sec): | ||
| if is_gb or is_pac: # noqa: F821 | ||
| khz = d0.get_int_property(sdk.la_device_property_e_DEVICE_FREQUENCY) # noqa: F821 | ||
| print("Device frequency khz: {}".format(khz)) | ||
| elif is_gr or is_graphene2: # noqa: F821 | ||
| khz = d0.get_int_property(sdk.la_device_property_e_MAC_FREQUENCY) # noqa: F821 | ||
| print("Mac frequency khz: {}".format(khz)) | ||
| else: | ||
| assert False, "Unsupported device type" | ||
| clock_time = 1. / (khz * 1000) | ||
| num_clocks_float = time_sec / (65535 * clock_time) | ||
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| if is_gb or is_pac: # noqa: F821 | ||
| bit_time = math.ceil(num_clocks_float) | ||
| elif is_gr or is_graphene2: # noqa: F821 | ||
| int_part = int(num_clocks_float) | ||
| float_part = num_clocks_float - int_part | ||
| print("Integer: {}".format(int_part)) | ||
| print("Float: {}".format(float_part)) | ||
| bit_time = (int_part << 10) + int(float_part * 1024) | ||
| if bit_time >= 2 ** 18: | ||
| print("Maxed out, setting bit time {} instead of {}".format((2 ** 18) - 1, bit_time)) | ||
| bit_time = (2 ** 18) - 1 | ||
| else: | ||
| assert False, "Unsupported device type" | ||
| print("Setting bit_time (number of clocks) to {}".format(bit_time)) | ||
| set_pfc_512bit_time(interface, bit_time, num_serdes_lanes=1) | ||
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| # Increase PFC pause time | ||
| num_ms = 50 | ||
| print("Setting PFC frame time to {}ms".format(num_ms)) | ||
| set_pfc512_bit_sec("INTERFACE", num_ms / 1000) |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,5 +1,7 @@ | ||
| import logging | ||
| import pytest | ||
| import os | ||
| import os.path | ||
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| from tests.common.fixtures.conn_graph_facts import conn_graph_facts # noqa F401 | ||
| from tests.common.fixtures.ptfhost_utils import copy_ptftests_directory # noqa F401 | ||
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@@ -244,3 +246,61 @@ def pfcwd_pause_service(ptfhost): | |
| needs_resume["garp_service"] = False | ||
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| logger.debug("pause_service needs_resume {}".format(needs_resume)) | ||
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| @pytest.fixture(scope="function", autouse=False) | ||
| def set_pfc_time_cisco_8000( | ||
| duthosts, | ||
| enum_rand_one_per_hwsku_frontend_hostname, | ||
| setup_pfc_test): | ||
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| duthost = duthosts[enum_rand_one_per_hwsku_frontend_hostname] | ||
| test_ports = setup_pfc_test['test_ports'] | ||
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| # Lets limit this to cisco and T2 only. | ||
| if not (duthost.facts['asic_type'] == "cisco-8000" | ||
| and duthost.get_facts().get("modular_chassis")): | ||
| yield | ||
| return | ||
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| PFC_TIME_SET_SCRIPT = "pfcwd/cisco/set_pfc_time.py" | ||
| PFC_TIME_RESET_SCRIPT = "pfcwd/cisco/default_pfc_time.py" | ||
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| for port in test_ports: | ||
| asic_id = "" | ||
| if duthost.sonichost.is_multi_asic: | ||
| asic_id = duthost.get_port_asic_instance(port).asic_index | ||
| set_pfc_timer_cisco_8000( | ||
| duthost, | ||
| asic_id, | ||
| PFC_TIME_SET_SCRIPT, | ||
| port) | ||
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| yield | ||
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| for port in test_ports: | ||
| asic_id = "" | ||
| if duthost.sonichost.is_multi_asic: | ||
| asic_id = duthost.get_port_asic_instance(port).asic_index | ||
| set_pfc_timer_cisco_8000( | ||
| duthost, | ||
| asic_id, | ||
| PFC_TIME_RESET_SCRIPT, | ||
| port) | ||
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| def set_pfc_timer_cisco_8000(duthost, asic_id, script, port): | ||
|
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. pls limit this change to Cisco T2 chassis only for now. |
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| script_name = os.path.basename(script) | ||
| dut_script_path = f"/tmp/{script_name}" | ||
| duthost.copy(src=script, dest=dut_script_path) | ||
| duthost.shell(f"sed -i 's/INTERFACE/{port}/' {dut_script_path}") | ||
| duthost.docker_copy_to_all_asics( | ||
| container_name=f"syncd{asic_id}", | ||
| src=dut_script_path, | ||
| dst="/") | ||
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| asic_arg = "" | ||
| if asic_id: | ||
| asic_arg = f"-n asic{asic_id}" | ||
| duthost.shell(f"show platform npu script {asic_arg} -s {script_name}") | ||
|
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. @rraghav-cisco i ran into this problem: cc @sdszhang
Contributor
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
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There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
pls limit this change to Cisco T2 chassis only for now.