Adding HW SKU files for `arista_7280r4(k)_32qf_32df` by arista-nwolfe · Pull Request #24206 · sonic-net/sonic-buildimage

arista-nwolfe · 2025-10-03T19:23:16Z

Creating and populating the /device/ directory for our arista_7280r4(k)_32qf_32df SKU.

mssonicbld · 2025-10-03T19:23:24Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-03T19:23:38Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2025-10-06T17:16:56Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-06T17:17:08Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2025-10-06T23:21:01Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-06T23:21:15Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2025-10-07T17:54:58Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-07T17:55:09Z

Azure Pipelines successfully started running 1 pipeline(s).

1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number

mssonicbld · 2025-10-09T23:16:30Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-09T23:16:41Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2025-10-23T18:34:35Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-10-23T18:34:49Z

Azure Pipelines successfully started running 1 pipeline(s).

kenneth-arista · 2025-11-05T17:24:14Z

@rlhui @arlakshm @tjchadaga

mssonicbld · 2025-11-05T22:08:15Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-11-05T22:08:30Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2025-11-07T22:03:19Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-11-07T22:03:30Z

Azure Pipelines successfully started running 1 pipeline(s).

device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF/port_config.ini

device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF/buffers_defaults_t2.j2

arlakshm · 2025-11-09T05:41:53Z

device/arista/x86_64-arista_7280r4_32qf_32df/chassisdb.conf

@@ -0,0 +1,4 @@
+start_chassis_db=1


why do we need chassis_db.conf for single asic device?

Not all the changes have gone in for running single-asic without chassis_db yet (E.G. sonic-net/sonic-swss#3847)
So for now we're still running with chassis_db.

this PR is merged. Can you remove this?

I tried removing the chassisdb.conf file but I get OA crashes

ERR swss#orchagent: :- getDbInfo: Failed to find CHASSIS_APP_DB database in : key INFO swss#supervisord: orchagent terminate called after throwing an instance of 'std::out_of_range' INFO swss#supervisord: orchagent what(): Failed to find CHASSIS_APP_DB database in : key

Can we work on removing the dependency on chassis_app_db after this PR goes through?
We've done all our testing on UT2 with CHASSIS_APP_DB until now, it's fairly last minute to try to pull it out as a change in this PR.

It looks like the problem is that even though sonic-net/sonic-swss#3847 merged the sonic-swss bump up hasn't occurred in master so the changes aren't present in the latest image.
But I'd still prefer to incorporate this in a subsequent PR after we've done more exhaustive testing without CHASSIS_APP_DB.
If we try to stall this change for that it may miss the 202511 cut off

arlakshm · 2025-11-09T05:43:47Z

device/arista/x86_64-arista_7280r4_32qf_32df/platform_env.conf

+SYNCD_SHM_SIZE=1gb
+dmasize=64M
+usemsi=1
+disaggregated_chassis=1


do we need this disaggregated_chassis=1

I thought we still needed this, we use this on QuartzDD
https://github.com/sonic-net/sonic-buildimage/blob/master/device/arista/x86_64-arista_7280dr3a_36/platform_env.conf#L4

We do not need this. For single asic we will check on the chassis_db.conf file existence

Same comment as above, we've been testing this with chassis_app_db until now, can we make this change in a subsequent PR once we've shaken out all the issues with running without chassis_app_db?

mssonicbld · 2025-11-10T21:55:09Z

/azp run Azure.sonic-buildimage

azure-pipelines · 2025-12-03T17:58:35Z

Azure Pipelines successfully started running 1 pipeline(s).

* Adding HW SKU files for arista_7280r4(k)_32qf_32df * Adding new brcm soc properties to the permitted list * Added various fixes on Citrine platform 1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number * Updating SKU files to fix some mistakes with the mappings * Fix typo on phy12_config.json * Set PSU LED as uncontrollable * Fix scd pci addrs * Update gearbox firmware filename * Fixing port_config.ini alias and generate_port_lists * Renaming SKUs to include -64O Arista-7280R4-32QF-32DF -> Arista-7280R4-32QF-32DF-64O Arista-7280R4K-32QF-32DF -> Arista-7280R4K-32QF-32DF-64O * Add and update L1 tuning files * Add workaround for running Q3D-A1 on SAI13 CS00012432596 * Ignore nvme sensors returning IO errors * Update PSU fan speed controllable attribute

* Adding HW SKU files for arista_7280r4(k)_32qf_32df * Adding new brcm soc properties to the permitted list * Added various fixes on Citrine platform 1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number * Updating SKU files to fix some mistakes with the mappings * Fix typo on phy12_config.json * Set PSU LED as uncontrollable * Fix scd pci addrs * Update gearbox firmware filename * Fixing port_config.ini alias and generate_port_lists * Renaming SKUs to include -64O Arista-7280R4-32QF-32DF -> Arista-7280R4-32QF-32DF-64O Arista-7280R4K-32QF-32DF -> Arista-7280R4K-32QF-32DF-64O * Add and update L1 tuning files * Add workaround for running Q3D-A1 on SAI13 CS00012432596 * Ignore nvme sensors returning IO errors * Update PSU fan speed controllable attribute Signed-off-by: Dawei Huang <daweihuang@microsoft.com>

* Adding HW SKU files for arista_7280r4(k)_32qf_32df * Adding new brcm soc properties to the permitted list * Added various fixes on Citrine platform 1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number * Updating SKU files to fix some mistakes with the mappings * Fix typo on phy12_config.json * Set PSU LED as uncontrollable * Fix scd pci addrs * Update gearbox firmware filename * Fixing port_config.ini alias and generate_port_lists * Renaming SKUs to include -64O Arista-7280R4-32QF-32DF -> Arista-7280R4-32QF-32DF-64O Arista-7280R4K-32QF-32DF -> Arista-7280R4K-32QF-32DF-64O * Add and update L1 tuning files * Add workaround for running Q3D-A1 on SAI13 CS00012432596 * Ignore nvme sensors returning IO errors * Update PSU fan speed controllable attribute Signed-off-by: xiaweijiang <xiaweijiang@microsoft.com>

mssonicbld · 2026-01-20T17:54:40Z

Cherry-pick PR to 202511: #25133

* Adding HW SKU files for arista_7280r4(k)_32qf_32df * Adding new brcm soc properties to the permitted list * Added various fixes on Citrine platform 1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number * Updating SKU files to fix some mistakes with the mappings * Fix typo on phy12_config.json * Set PSU LED as uncontrollable * Fix scd pci addrs * Update gearbox firmware filename * Fixing port_config.ini alias and generate_port_lists * Renaming SKUs to include -64O Arista-7280R4-32QF-32DF -> Arista-7280R4-32QF-32DF-64O Arista-7280R4K-32QF-32DF -> Arista-7280R4K-32QF-32DF-64O * Add and update L1 tuning files * Add workaround for running Q3D-A1 on SAI13 CS00012432596 * Ignore nvme sensors returning IO errors * Update PSU fan speed controllable attribute

mssonicbld · 2026-01-26T22:14:15Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

mssonicbld · 2026-01-26T23:12:52Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

mssonicbld · 2026-01-27T22:13:00Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

mssonicbld · 2026-01-27T23:13:09Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

mssonicbld · 2026-01-29T22:14:01Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

mssonicbld · 2026-01-29T23:14:09Z

@arista-nwolfe cherry pick PR didn't pass PR checker. Please check!!!
#25133

* Adding HW SKU files for arista_7280r4(k)_32qf_32df * Adding new brcm soc properties to the permitted list * Added various fixes on Citrine platform 1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number * Updating SKU files to fix some mistakes with the mappings * Fix typo on phy12_config.json * Set PSU LED as uncontrollable * Fix scd pci addrs * Update gearbox firmware filename * Fixing port_config.ini alias and generate_port_lists * Renaming SKUs to include -64O Arista-7280R4-32QF-32DF -> Arista-7280R4-32QF-32DF-64O Arista-7280R4K-32QF-32DF -> Arista-7280R4K-32QF-32DF-64O * Add and update L1 tuning files * Add workaround for running Q3D-A1 on SAI13 CS00012432596 * Ignore nvme sensors returning IO errors * Update PSU fan speed controllable attribute Signed-off-by: Feng Pan <fenpan@microsoft.com>

sonic-net/sonic-swss#3926 introduces the ability to indicate whether a gearbox phy supports macsec or not. This allows the macsecorch to send the macsec SAI calls to the switching asic (syncd) instead of the gearbox phy (gbsyncd). arista_7280r4(k)_32qf_32df is a platform that has this same behavior (GB doesn't support macsec). The parent PR for this SKU is #24206 Signed-off-by: Nathan Wolfe <nwolfe@arista.com> Co-authored-by: Arvindsrinivasan Lakshmi Narasimhan <55814491+arlakshm@users.noreply.github.com>

This change depends on sonic-net/sonic-swss#3926 merging first. sonic-net/sonic-swss#3926 introduces the ability to indicate whether a gearbox phy supports macsec or not. This allows the macsecorch to send the macsec SAI calls to the switching asic (syncd) instead of the gearbox phy (gbsyncd). `arista_7280r4(k)_32qf_32df` is a platform that has this same behavior (GB doesn't support macsec). The parent PR for this SKU is sonic-net#24206 #### Which release branch to backport (provide reason below if selected)  - [ ] 202205 - [ ] 202211 - [ ] 202305 - [ ] 202311 - [ ] 202405 - [ ] 202411 - [ ] 202505 - [x] 202511 Signed-off-by: Sonic Build Admin <sonicbld@microsoft.com>

sonic-net/sonic-swss#3926 introduces the ability to indicate whether a gearbox phy supports macsec or not. This allows the macsecorch to send the macsec SAI calls to the switching asic (syncd) instead of the gearbox phy (gbsyncd). arista_7280r4(k)_32qf_32df is a platform that has this same behavior (GB doesn't support macsec). The parent PR for this SKU is sonic-net#24206 Signed-off-by: Nathan Wolfe <nwolfe@arista.com> Co-authored-by: Arvindsrinivasan Lakshmi Narasimhan <55814491+arlakshm@users.noreply.github.com> Signed-off-by: jackson <jackson@micasnetworks.com>

…#25960) This change depends on sonic-net/sonic-swss#3926 merging first. sonic-net/sonic-swss#3926 introduces the ability to indicate whether a gearbox phy supports macsec or not. This allows the macsecorch to send the macsec SAI calls to the switching asic (syncd) instead of the gearbox phy (gbsyncd). `arista_7280r4(k)_32qf_32df` is a platform that has this same behavior (GB doesn't support macsec). The parent PR for this SKU is #24206 #### Which release branch to backport (provide reason below if selected)  - [ ] 202205 - [ ] 202211 - [ ] 202305 - [ ] 202311 - [ ] 202405 - [ ] 202411 - [ ] 202505 - [x] 202511 Signed-off-by: Sonic Build Admin <sonicbld@microsoft.com>

Adding HW SKU files for arista_7280r4(k)_32qf_32df

a8d57ad

arista-nwolfe added this to SONiC Chassis Oct 3, 2025

Adding new brcm soc properties to the permitted list

7965956

arista-nwolfe requested a review from lguohan as a code owner October 6, 2025 17:16

Missed adding gbsyncd.ini

a07f187

Missed a gbsyncd.ini symlink and removed topology tag

1723429

Added various fixes on Citrine platform

69317e9

1. Fixed Scd PCI addrs 2. Fixed PHY library name 3. Fixed FEC encoding to match SAI convension 4. Fixed Ethernet-Rec0 lane number

Updating SKU files to fix some mistakes with the mappings

d1aca30

Fix typo on phy12_config.json

b4b9bd5

Set PSU LED as uncontrollable

5e18dcc

arlakshm reviewed Nov 9, 2025

View reviewed changes

Fix scd pci addrs

2fd213a

rlhui merged commit cf7dbe0 into sonic-net:master Dec 5, 2025
22 checks passed

github-project-automation bot moved this to Done in SONiC Chassis Dec 5, 2025

arista-nwolfe mentioned this pull request Dec 5, 2025

Disabling macsec support on arista_7280r4(k)_32qf_32df gearbox phys #24761

Merged

8 tasks

arista-hpandya mentioned this pull request Jan 20, 2026

Update sensors.conf in x86_64-arista_7280r4{k}_32qf_32df SKUs #25036

Merged

8 tasks

vmittal-msft added the Approved for 202511 Branch label Jan 20, 2026

mssonicbld mentioned this pull request Jan 20, 2026

[action] [PR:24206] Adding HW SKU files for arista_7280r4(k)_32qf_32df #25133

Merged

mssonicbld added the Created PR to 202511 Branch label Jan 20, 2026

mssonicbld added Included in 202511 Branch and removed Created PR to 202511 Branch labels Jan 30, 2026

mssonicbld mentioned this pull request Mar 8, 2026

[action] [PR:24761] Disabling macsec support on arista_7280r4(k)_32qf_32df gearbox phys #25960

Merged

8 tasks

Conversation

arista-nwolfe commented Oct 3, 2025

Uh oh!

mssonicbld commented Oct 3, 2025

Uh oh!

azure-pipelines bot commented Oct 3, 2025

Uh oh!

mssonicbld commented Oct 6, 2025

Uh oh!

azure-pipelines bot commented Oct 6, 2025

Uh oh!

mssonicbld commented Oct 6, 2025

Uh oh!

azure-pipelines bot commented Oct 6, 2025

Uh oh!

mssonicbld commented Oct 7, 2025

Uh oh!

azure-pipelines bot commented Oct 7, 2025

Uh oh!

mssonicbld commented Oct 9, 2025

Uh oh!

azure-pipelines bot commented Oct 9, 2025

Uh oh!

mssonicbld commented Oct 23, 2025

Uh oh!

azure-pipelines bot commented Oct 23, 2025

Uh oh!

kenneth-arista commented Nov 5, 2025

Uh oh!

mssonicbld commented Nov 5, 2025

Uh oh!

azure-pipelines bot commented Nov 5, 2025

Uh oh!

mssonicbld commented Nov 7, 2025

Uh oh!

azure-pipelines bot commented Nov 7, 2025

Uh oh!

Uh oh!

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

arista-nwolfe Nov 25, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

mssonicbld commented Nov 10, 2025

Uh oh!

azure-pipelines bot commented Dec 3, 2025

Uh oh!

Uh oh!

mssonicbld commented Jan 20, 2026

Uh oh!

mssonicbld commented Jan 26, 2026

Uh oh!

mssonicbld commented Jan 26, 2026

Uh oh!

mssonicbld commented Jan 27, 2026

Uh oh!

mssonicbld commented Jan 27, 2026

Uh oh!

mssonicbld commented Jan 29, 2026

Uh oh!

mssonicbld commented Jan 29, 2026

Uh oh!

Reviewers

Assignees

arista-nwolfe Nov 25, 2025 •

edited

Loading