target: Add Verilator 5 support

[paulsc96]

Requirements for using Verilator 5 with our testbench (sorted by difficulty):

• Get, use new release of common_cells incorporating pulp-platform/common_cells@8ac55cf
• Merge and use Fix implicit cast of enum-type axi_llc#18
• Get axi_sim_mem and its dependencies included without including incompatible simulation/test code.
• Fix, Merge, and use WIP: Add a simpler version of the driver compatible with Verilator 5.020 riscv-dbg#167 Just include jtag_test_simple
• Work around sim/src/vip_cheshire_soc.sv:90: Unsupported: DPI argument of type DYNARRAYDTYPE on buffer[]: Labelled Wontfix, so use chunked transfers like Croc did.
• Work around strange compile issue with UART readout (to be investigated).
• Make binary reading workaround a bit less terrible
• Reduce verilator runtime further, investigate GCC vs clang
• Try to add back as much functionality as we can, stub the rest well
• Work around or exclude unsupported AXI drivers for serial link
• Work around or exclude unsupported device models (only SPI model?)

Fixes #180 and Closes #39 (outdated).

@thommythomaso @phsauter

[cousteaulecommandant]

Would it help if write() in elfloader.cpp initialized the vector from the input array directly rather than copying the content byte by byte? I don't know if this has anything to do with the binary reading issue mentioned but I would imagine it could speed things up.

static void write (uint64_t address, uint64_t len, uint8_t *buf)
{
  std::vector<uint8_t> mem(buf, buf+len);
  mems.insert(std::make_pair(address, mem));
}

[paulsc96]

Closed in favor of #230.