[Mellanox] Add SPC5 SN5640 platform, Mellanox-SN5640-C512S2,Mellanox-SN5640-C448O16 SKUs

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers.json.j2

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+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_objects.j2

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+../Mellanox-SN5640-C512S2/buffers_defaults_objects.j2

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2

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+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '0m' %}
+{%-set ports2cable = {
+            'torrouter_server'       : '0m',
+            'leafrouter_torrouter'   : '0m',
+            'spinerouter_leafrouter' : '0m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '108271616' %}
+{% set ingress_lossless_pool_xoff =  '0' %}
+{% set egress_lossless_pool_size =  '136210432' %}
+{% set egress_lossy_pool_size =  '108271616' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2

@@ -0,0 +1,54 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '0m' %}
+{%-set ports2cable = {
+            'torrouter_server'       : '0m',
+            'leafrouter_torrouter'   : '0m',
+            'spinerouter_leafrouter' : '0m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '108271616' %}
+{% set ingress_lossless_pool_xoff =  '0' %}
+{% set egress_lossless_pool_size =  '136210432' %}
+{% set egress_lossy_pool_size =  '108271616' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_dynamic.json.j2

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+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2

device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/create_only_config_db_buffers.json

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+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}