[SPIR-V][Doc] add draft SPIR-V extension for 16-bit atomics #20009
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Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…on (#3343) (#3344) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> --------- Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 16, 2025
…on (#3343) (#3345) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> --------- Signed-off-by: Sidorov, Dmitry <[email protected]>
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…on (#3343) (#3346) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> --------- Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 16, 2025
…on (#3343) (#3347) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> --------- Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 16, 2025
…on (#3343) (#3348) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 16, 2025
…on (#3343) (#3349) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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We may want to consider broadening this extension to support 16-bit atomics more generally vs. just bfloat16 atomics. Here's what this might look like:
Just like in this current draft for bfloat16 atomics, I don't think we would need any new instructions, and would just support 16-bit types for existing atomic instructions. |
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Sep 22, 2025
…on (KhronosGroup#3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 22, 2025
…on (#3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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Sep 26, 2025
…3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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…on (KhronosGroup#3343) Spec is available here: intel/llvm#20009 Author: "Ratajewski, Andrzej" <[email protected]> Signed-off-by: Sidorov, Dmitry <[email protected]>
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I've assigned enums for the new SPIR-V instructions and the new OpenCL queries. @intel/dpcpp-spirv-doc-reviewers I believe this is ready for final review and merging. |
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Nov 9, 2025
…tomics` extension (#166257) This enables support for atomic RMW ops (add, sub, min and max to be precise) with `bfloat16` operands, via the [SPV_INTEL_16bit_atomics extension](intel/llvm#20009). It's logically a successor to #166031 (I should've used a stack), but I'm putting it up for early review. --------- Co-authored-by: Matt Arsenault <[email protected]>
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…TEL_16bit_atomics` extension (#166257) This enables support for atomic RMW ops (add, sub, min and max to be precise) with `bfloat16` operands, via the [SPV_INTEL_16bit_atomics extension](intel/llvm#20009). It's logically a successor to #166031 (I should've used a stack), but I'm putting it up for early review. --------- Co-authored-by: Matt Arsenault <[email protected]>
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Nov 18, 2025
This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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Nov 18, 2025
…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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Nov 19, 2025
…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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…3424) This continues KhronosGroup#3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009 note for llvm14 branch: removed atomicrmw_fminfmax.ll test as it seems like llvm14 don't have atomicrmw fmin
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009
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This continues #3343 and reflects specification update, including extension renaming. Specification: intel/llvm#20009 note for llvm14 branch: removed atomicrmw_fminfmax.ll test as it seems like llvm14 don't have atomicrmw fmin
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This continues #3343 and reflects specification update, including extension renaming. Specification: #20009 Original commit: KhronosGroup/SPIRV-LLVM-Translator@2f2a95e686e72ec
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Adds the proposed SPV_INTEL_shader_atomic_bfloat16 extension specification, which extends the floating-point atomic support in SPIR-V to support floating-point atomic addition, minimum, and maximum on 16-bit bfloat16 floating-point numbers in memory.