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setInternalRegsDelayFree only for candidate lclVars #62884

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Merged
kunalspathak merged 1 commit into from
Dec 17, 2021
Merged

setInternalRegsDelayFree only for candidate lclVars #62884

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8 changes: 6 additions & 2 deletions src/coreclr/jit/lsrabuild.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3456,8 +3456,12 @@ int LinearScan::BuildStoreLoc(GenTreeLclVarCommon* storeLoc)
{
// Need an additional register to create a SIMD8 from EAX/EDX without SSE4.1.
buildInternalFloatRegisterDefForNode(storeLoc, allSIMDRegs());
// This internal register must be different from the target register.
setInternalRegsDelayFree = true;

if (isCandidateVar(varDsc))
{
// This internal register must be different from the target register.
setInternalRegsDelayFree = true;
}
}
}
#endif // FEATURE_SIMD && TARGET_X86
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