dma: enable edma drivers for mcux

[hakehuang]

edma rt series support. tested on mimxrt1060_evt/frdmk64f
MEMORY_NOCACHE is needed for rt
test slot need special set for kinetis

Signed-off-by: Hake Huang hake.huang@oss.nxp.com

Depends on zephyrproject-rtos/hal_nxp#35

[zephyrbot]

All checks are passing now.

checkpatch (informational only, not a failure)

-:890: WARNING:DT_SPLIT_BINDING_PATCH: DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.txt

-:914: WARNING:DT_SPLIT_BINDING_PATCH: DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.txt

-:1057: WARNING:PREFER_SECTION: __section(.nocache) is preferred over __attribute__((section(".nocache")))
#1057: FILE: tests/drivers/dma/chan_blen_transfer/src/test_dma.c:31:
+	__attribute__((__section__(".nocache")));

-:1060: WARNING:PREFER_SECTION: __section(.nocache.dma) is preferred over __attribute__((section(".nocache.dma")))
#1060: FILE: tests/drivers/dma/chan_blen_transfer/src/test_dma.c:34:
+	__attribute__((__section__(".nocache.dma")));

-:1125: WARNING:PREFER_SECTION: __section(.nocache) is preferred over __attribute__((section(".nocache")))
#1125: FILE: tests/drivers/dma/loop_transfer/src/dma.c:25:
+	__attribute__((__section__(".nocache")));

-:1127: WARNING:PREFER_SECTION: __section(.nocache.dma) is preferred over __attribute__((section(".nocache.dma")))
#1127: FILE: tests/drivers/dma/loop_transfer/src/dma.c:27:
+	__attribute__((__section__(".nocache.dma")));

- total: 0 errors, 6 warnings, 1053 lines checked

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[erwango]

I'm fine with current change, but it would have been nice that others can use DMA_MCUX_TEST_SLOT_START. This can be changed in upcoming change.

[carlescufi]

API meeting:

No objections to the changes in the DMA config structure, except for additional comments.

[MaureenHelm]

tests/drivers/dma/loop_transfer doesn't seem to work at runtime:

On frdm_k64f:

*** Booting Zephyr OS build v2.3.0-rc1-6-g90ad28307ca0  ***
DMA memory to memory transfer started on DMA_0
Preparing DMA Controller
Starting the transfer and waiting for 1 second
TX data: The quick brown fox jumps over the lazy dog
block_size 43
I: channel 0 error status is 0x2
ERROR: unfinished transfer
Each RX buffer should contain the full TX buffer string.
TX data: The quick brown fox jumps over the lazy dog
RX data Loop 0: The quick brown fox jumps over the lazy dog
RX data Loop 1: The quick brown fox jups
RX data Loop 2: 
RX data Loop 3: 
RX data Loop 4: 
Finished: DMA

On mimxrt1064_evk:

*** Booting Zephyr OS build v2.3.0-rc1-6-g90ad28307ca0  ***
DMA memory to memory transfer started on DMA_0
Preparing DMA Controller
Starting the transfer and waiting for 1 second
TX data: The quick brown fox jumps over the lazy dog
block_size 43
Each RX buffer should contain the full TX buffer string.
TX data: The quick brown fox jumps over the lazy dog
RX data Loop 0: The quick brown fox jumps over the lazy dogpqt
RX data Loop 1: The quick brown fox jumps over the lazy dog
RX data Loop 2: The quick brown fox jumps over the lazy dogp
RX data Loop 3: The quick brown fox jumps over the lazy dog
RX data Loop 4: The quick brown fox jumps over the lazy dog�
Finished: DMA

[hakehuang]

@MaureenHelm , Thanks for this checking. I see problem in FRDM_K64F, I will debug this. for RT1064 problem, it is because the received buffer size is more than the data transferred, and some random data is print out, let me fix it as well.

the frdmk64f problem seems we can not call the strlen in irq call back, if I replace it to sizeof, or a fix value, this problem gone. some analysis foundings: we'd better not access the tx/rx memory then we start to use it as dma in dma ira handler, strlen(tx) will try to access tx memory, this would cause problem, in dma finish irq.

and for frdmk64f the src size shall be times of 8 bytes, according to the reference manual, so I add padding.

log for frdmk64f

Booting Zephyr OS build zephyr-v2.2.0-2822-g91ac7bd2bfb1  ***
DMA memory to memory transfer started on DMA_0
Preparing DMA Controller
Starting the transfer and waiting for 1 second
TX data: The quick brown fox jumps over the lazy dog ....
block_size 48
Each RX buffer should contain the full TX buffer string.
TX data: The quick brown fox jumps over the lazy dog ....
RX data Loop 0: The quick brown fox jumps over the lazy dog ....
RX data Loop 1: The quick brown fox jumps over the lazy dog ....
RX data Loop 2: The quick brown fox jumps over the lazy dog ....
RX data Loop 3: The quick brown fox jumps over the lazy dog ....
RX data Loop 4: The quick brown fox jumps over the lazy dog ....
Finished: DMA

log for rt1064

*** Booting Zephyr OS build zephyr-v2.2.0-2822-g91ac7bd2bfb1  ***
DMA memory to memory transfer started on DMA_0
Preparing DMA Controller
Starting the transfer and waiting for 1 second
TX data: The quick brown fox jumps over the lazy dog
block_size 43
Each RX buffer should contain the full TX buffer string.
TX data: The quick brown fox jumps over the lazy dog
RX data Loop 0: The quick brown fox jumps over the lazy dog
RX data Loop 1: The quick brown fox jumps over the lazy dog
RX data Loop 2: The quick brown fox jumps over the lazy dog
RX data Loop 3: The quick brown fox jumps over the lazy dog
RX data Loop 4: The quick brown fox jumps over the lazy dog
Finished: DMA