[Mellanox] [SKU] Mellanox-SN4700-C128 SKU added#24
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Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
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don't suggest exposing this |
Yeah |
| @@ -0,0 +1,41 @@ | |||
| ## | |||
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the numbers are correct but we do not need the numbers for speed 200000 since there is no 200G port on this SKU.
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the numbers are correct but we do not need the numbers for speed 200000 since there is no 200G port on this SKU.
customer asked us to add it. Maybe for future use.
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let's keep it then. 200G for 4x ports right?
| {% set ingress_lossless_pool_size = '36405216' %} | ||
| {% set ingress_lossless_pool_xoff = '11567088' %} | ||
| {% set egress_lossless_pool_size = '60817392' %} | ||
| {% set egress_lossy_pool_size = '36405216' %} |
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As a convention, we round down by cell size for egress_lossless_pool only. For the rest sizes, we do not round them down.
| {% set ingress_lossless_pool_size = '36405216' %} | |
| {% set ingress_lossless_pool_xoff = '11567088' %} | |
| {% set egress_lossless_pool_size = '60817392' %} | |
| {% set egress_lossy_pool_size = '36405216' %} | |
| {% set ingress_lossless_pool_size = '36405248' %} | |
| {% set ingress_lossless_pool_xoff = '11567104' %} | |
| {% set egress_lossless_pool_size = '60817392' %} | |
| {% set egress_lossy_pool_size = '36405248' %} |
Just to double check, they do not use features like everflow, etc, right |
I think no. But Assaf, Can you confirm? |
Yes, customer asked for ratio of 1:8. Regarding everflow, i guess not, but its not part of hwsku questions. |
Thanks @assafho . Better to know it. this is something we missed in hwsku questions. |
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
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@stephenxs, Apart from clarification on mirroring, is anything left for buffers? |
No. all the rest LGTM. |
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
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Mirroring is required and updated buffer defaults |
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| SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 | |||
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Why do we need SAI_VXLAN_SRCPORT_RANGE_ENABLE? I believe this is removed in latest branches. Please check
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Yes, it was removed. Will update
| <module>17</module> | ||
| <breakout-modes>3</breakout-modes> | ||
| <port-speed>1536</port-speed> | ||
| <split>4</split></port-info> |
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The split and closing port info are not properly aligned. Can you please align?
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
Changes: Update submodule branch to 202012 [sonic-linkmgrd][202012] submodule update a8ddff5 Jing Zhang Fri Feb 25 11:38:28 2022 Incrementing tolerance on mux state inconsistency (#27) a3f78a3 Jing Zhang Thu Feb 17 17:23:56 2022 Update log level for mux probing and mux state chance (#23) 05156fb Jing Zhang Thu Feb 17 17:21:01 2022 Handle xcvrd crashing scenarios (#22) 74529ef Longxiang Lyu Mon Feb 14 13:26:07 2022 [make] Enable make extra includes (#24) sign-off: Jing Zhang zhangjing@microsoft.com
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com> Co-authored-by: Vivek Reddy Karri <vkarri@nvidia.com>
…sonic-net#21269) #### Why I did it src/dhcpmon ``` * e003522 - (HEAD -> master, origin/master, origin/HEAD) [Build] Update to buijld bookworm debian package (#24) (21 hours ago) [Yaqiang Zhu] ``` #### How I did it #### How to verify it #### Description for the changelog
… automatically (sonic-net#635) #### Why I did it src/sonic-platform-common ``` * d9de488 - (HEAD -> 202412, origin/202412) [code sync] Merge code from sonic-net/sonic-platform-common:202411 to 202412 (#28) (7 hours ago) [mssonicbld] * 30112ca - [code sync] Merge code from sonic-net/sonic-platform-common:202411 to 202412 (#26) (31 hours ago) [mssonicbld] * a36263b - [code sync] Merge code from sonic-net/sonic-platform-common:202411 to 202412 (#24) (2 days ago) [mssonicbld] ``` #### How I did it #### How to verify it #### Description for the changelog
…tically (sonic-net#723) #### Why I did it src/sonic-sairedis ``` * 5ee5610 - (HEAD -> 202412, origin/HEAD, origin/202412) [code sync] Merge code from sonic-net/sonic-sairedis:202411 to 202412 (#24) (21 hours ago) [mssonicbld] ``` #### How I did it #### How to verify it #### Description for the changelog
…tomatically (sonic-net#754) #### Why I did it src/sonic-linux-kernel ``` * 3f0c0de - (HEAD -> 202412, origin/HEAD, origin/202412) [code sync] Merge code from sonic-net/sonic-linux-kernel:202411 to 202412 (#24) (20 hours ago) [mssonicbld] ``` #### How I did it #### How to verify it #### Description for the changelog
…omatically (sonic-net#770) #### Why I did it src/sonic-swss-common ``` * 9a7a61a - (HEAD -> 202412, origin/HEAD, origin/202412) [FC] remove FLEX_COUNTER_DELAY_STATUS_FIELD (sonic-net#982) (#24) (21 hours ago) [mssonicbld] ``` #### How I did it #### How to verify it #### Description for the changelog
…t back to back Paladin ports up with Arista-7060X6-16PE-384C-O128S2 (sonic-net#22719) <!-- Please make sure you've read and understood our contributing guidelines: https://github.com/Azure/SONiC/blob/gh-pages/CONTRIBUTING.md failure_prs.log skip_prs.log Make sure all your commits include a signature generated with `git commit -s` ** If this is a bug fix, make sure your description includes "fixes #xxxx", or "closes #xxxx" or "resolves #xxxx" Please provide the following information: --> #### Why I did it Currently when we loaded HWSKU `Arista-7060X6-16PE-384C-O128S2` on two moby devices and connect their Paladin ports back to back, we can't get link up. It may help if we can get these links up and run the tests. ##### Work item tracking - Microsoft ADO **(number only)**: #### How I did it Created a new `FANOUT` HWSKU containing special lanemap and polarity configs so that we can load `Arista-7060X6-16PE-384C-O128S2` on one Moby and `Arista-7060X6-16PE-384C-O128S2-FANOUT` and get Paladin ports up when connecting them back to back with the following setup: ``` Moby1 Moby2 HWSKU: Arista-7060X6-16PE-384C-O128S2 HWSKU: Arista-7060X6-16PE-384C-O128S2-FANOUT #17 <-> #18 #19 <-> #20 #21 <-> #22 #23 <-> #24 #18 <-> #17 #20 <-> #19 #22 <-> #21 #24 <-> #23 ``` #### How to verify it Verified that all the Paladin ports can link up with the above setup. <!-- If PR needs to be backported, then the PR must be tested against the base branch and the earliest backport release branch and provide tested image version on these two branches. For example, if the PR is requested for master, 202211 and 202012, then the requester needs to provide test results on master and 202012. --> #### Which release branch to backport (provide reason below if selected) <!-- - Note we only backport fixes to a release branch, *not* features! - Please also provide a reason for the backporting below. - e.g. - [x] 202006 --> - [ ] 201811 - [ ] 201911 - [ ] 202006 - [ ] 202012 - [ ] 202106 - [ ] 202111 - [ ] 202205 - [ ] 202211 - [ ] 202305 - [x] msft-202412 #### Tested branch (Please provide the tested image version) <!-- - Please provide tested image version - e.g. - [x] 20201231.100 --> - [ ] <!-- image version 1 --> - [ ] <!-- image version 2 --> - [x] msft-202412 #### Description for the changelog <!-- Write a short (one line) summary that describes the changes in this pull request for inclusion in the changelog: --> Created `Arista-7060X6-16PE-384C-O128S2-FANOUT` based on `Arista-7060X6-16PE-384C-O128S2` and only update lanemap and polarity settings in bcm config. <!-- Ensure to add label/tag for the feature raised. example - PR#2174 under sonic-utilities repo. where, Generic Config and Update feature has been labelled as GCU. --> #### Link to config_db schema for YANG module changes <!-- Provide a link to config_db schema for the table for which YANG model is defined Link should point to correct section on https://github.com/Azure/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md --> #### A picture of a cute animal (not mandatory but encouraged)
…ly (sonic-net#24550) #### Why I did it src/sonic-bmp ``` * db23384 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #24 from yijingyan2/migrate-agent-pool-master (3 days ago) [StormLiangMS] * b4e1bc5 - Automated agent pool migration (7 days ago) [yijingyan2] ``` #### How I did it #### How to verify it #### Description for the changelog
Signed-off-by: Vivek Reddy Karri vkarri@nvidia.com
Why I did it
Draft a new SKU for MSN-4700 Platform i.e. Mellanox-SN4700-C128
Requirements:
LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentageis usedAdditional Details:
SpineRouterthrough config_db.json inDEVICE_METADATA|localhost|typefield for the buffer values & cable lengths defined in the buffers_defaults_t2.j2 to apply on the devicebuffer_defaults_{t0,t1,t2}.j2valuesHow I did it
How to verify it
Which release branch to backport (provide reason below if selected)
Description for the changelog
Link to config_db schema for YANG module changes
A picture of a cute animal (not mandatory but encouraged)