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A beginner-level project that implements a 4-bit Arithmetic Logic Unit (ALU) supporting basic operations like ADD, SUB, AND, OR, XOR, NOT, INC, and DEC. Simulated using SystemVerilog and ideal for learning digital design fundamentals.

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vishnuvarshini26/verilog-project

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πŸ”’ 4-Bit ALU (Arithmetic Logic Unit) – Verilog Project

πŸ“Œ Description This project is a basic 4-bit Arithmetic Logic Unit (ALU) designed using SystemVerilog. An ALU is a core part of a processor that performs arithmetic and logical operations. This beginner-friendly module supports 8 essential operations and helps students understand the backbone of how CPUs process binary data.

βš™οΈ Operations Supported The ALU performs the following operations based on a 3-bit opcode:

Opcode Operation Description
000 ADD a + b
001 SUBTRACT a - b
010 AND a & b
011 OR `a
100 XOR a ^ b
101 NOT A ~a
110 INCREMENT A a + 1
111 DECREMENT A a - 1

πŸ’‘ Real-Time Application (Simplified) This mini-ALU project is a basic building block of real processors. In real devices like calculators, embedded systems, or even mobile CPUs:

  • ALUs perform fast math and logic operations.
  • Multiple ALUs work together to handle different instructions.
  • This 4-bit version is a smaller model used to understand how larger ALUs work in real systems.

πŸ› οΈ How to Simulate You can simulate this design using:

EDA Playground** (Online) ModelSim / Icarus Verilog** (Local)

πŸ’» Files Included:

  • alu_4bit.sv – ALU logic
  • tb_alu_4bit.sv – Testbench for simulation

βœ… Steps:

  1. Paste the code in EDA Playground.
  2. Select SystemVerilog and a simulator like Icarus Verilog.
  3. Run the simulation and observe outputs in the terminal.

πŸ“ˆ Future Updates

  • Add 8-bit ALU support.
  • Include overflow and carry flags.
  • Create a simple CPU block with control unit + ALU.
  • Add waveform-based test cases.

πŸ“š Topics Covered

  • Verilog/SystemVerilog Basics
  • Case Statements & Opcodes
  • Combinational Logic
  • Testbenches & Simulation

πŸ™Œ Contribution Beginner-friendly. Fork it, run it, modify it. Learn digital design hands-on! 😊

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A beginner-level project that implements a 4-bit Arithmetic Logic Unit (ALU) supporting basic operations like ADD, SUB, AND, OR, XOR, NOT, INC, and DEC. Simulated using SystemVerilog and ideal for learning digital design fundamentals.

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