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Add paged attention kernel for Spyre#23

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kiszk wants to merge 4 commits into
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kernels_paged_attn
Open

Add paged attention kernel for Spyre#23
kiszk wants to merge 4 commits into
mainfrom
kernels_paged_attn

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@kiszk

@kiszk kiszk commented Jun 26, 2026

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This PR adds a paged attention kernel based on @ani300 's implementation.
This version uses a logical (PyTorch) tensor shape.

A test using ktir-cpu passed.

$ .venv/bin/python -m pytest tests/ktir/test_paged_attn.py -v
========================================================================================================================================================================================================================= test session starts =========================================================================================================================================================================================================================
platform linux -- Python 3.12.13, pytest-9.1.1, pluggy-1.6.0 -- /home/ishizaki/aiu-src/dt-inductor/spyre-kernels/.venv/bin/python
cachedir: .pytest_cache
rootdir: /home/ishizaki/aiu-src/dt-inductor/spyre-kernels
configfile: pyproject.toml
collected 2 items                                                                                                                                                                                                                                                                                                                                                                                                                                                     

tests/ktir/test_paged_attn.py::test_paged_attn_ktir[tensor_descriptor] SKIPPED (tensor_descriptor.ktir not generated yet (run scripts/gen_ktir.py paged_attn))                                                                                                                                                                                                                                                                                                  [ 50%]
tests/ktir/test_paged_attn.py::test_paged_attn_ktir[spyre_aware] PASSED                                                                                                                                                                                                                                                                                                                                                                                         [100%]

==================================================================================================================================================================================================================== 1 passed, 1 skipped in 0.16s =====================================================================================================================================================================================================================

Signed-off-by: Kazuaki Ishizaki <ishizaki@jp.ibm.com>
@kiszk kiszk requested review from fabianlim and ohadeytan June 26, 2026 06:21


@triton.jit
def _paged_attn_kernel_NHD_td(

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I feel that having the _td is not really needed, if you need to import them into the same file we could do import as?

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@fabianlim I follow this convention. Is it ok with removing _td? I am neutral on this.

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ic sorry then lets leave it

Comment thread kernels/paged_attn/original.py Outdated
):
HD: tl.constexpr = H * BLOCK_D

cur_b = tl.program_id(0)

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im abit confused with the original kernel, it is already in tensor descriptor, I thought this repo's scope is to rewrite kernels that were previously in pointer arithmetic

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I see. I started working with tensor descriptor at first. I will drop original.py

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Addressed

vv = tl.permute(v_g, (0, 2, 1, 3)) # (BLK_B, BLK_H, KV_BLOCK, D)

# 4-D batched matmul over (BLK_B, BLK_H)
scores = tl.dot(q, kT) # (BLK_B, BLK_H, BLOCK_Q, KV_BLOCK)

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this is not standard triton. tl.dot cannot accept a 4D tensor. The tensor_descriptor.py needs to be runnable on other archs like GPU

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sorry as clarified by @kiszk we have tl.core insert reshapes as per this code

straight in as the index, and `h_start` is the second index — yielding
`(BLK_B, KV_BLOCK, BLK_H, D)` directly, with **no reshape** of the index or of
the gathered result. This maps the gather onto the Spyre indirect-access tile
more directly than the flatten/reshape of the base form.

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will be good to have a comment that need to revisit with the physical layouts

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Thanks, I will add the comment.

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Addressed

Signed-off-by: Kazuaki Ishizaki <ishizaki@jp.ibm.com>
@kiszk

kiszk commented Jun 29, 2026

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@fabianlim I addressed your comments except the first one.

@fabianlim fabianlim left a comment

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comments are addressed

Signed-off-by: Kazuaki Ishizaki <ishizaki@jp.ibm.com>
Signed-off-by: Kazuaki Ishizaki <ishizaki@jp.ibm.com>
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