Add Q16x8 Depthwise Conv Support#2140
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Adds support for 16-bit activations + 8-bit weights for depthwise convolution in the reference kernel. Uses 64-bit bias to match TFLite. Tested: depthwise_conv_test
For ARC, CEVA, and Xtensa add in a reference fallback for q16x8 depthwise convolution. This allows these platforms to still run the same models as well as fixes failed tests.
The Xtensa deptwise conv was correct for eval, but the Hifi prepare expects 8-bit IO. Early exit in the prepare to skip the Hifi and P6 prepare (those evals will never be called on q16 data). BUG: 2141
rascani
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Jul 31, 2023
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LGTM, just one minor comment clarification and will approve.
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| TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) { | ||
| TF_LITE_ENSURE_OK(context, DepthwiseConvPrepare(context, node)); | ||
| // Use only the default depthwise convolution for int16 input. |
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Can we expand this comment a bit to explain why we only need to do the default for int16? Specifically, we should mention that we fall back to the reference kernels for int16, so there's no need to call the Xtensa-specific Prepare methods.
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Thanks for the review. Updated. I did once again forget the bug on this commit but it should work overall with a squash commit (with the top-level message above).
rascani
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Aug 1, 2023
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Adds support for 16-bit activations + 8-bit weights for depthwise convolution in the reference kernel. Uses 64-bit bias to match TFLite. Also adds passthrough to the q16x8 reference kernel for Xtensa, CEVA, and ARC (CMSIS already has it's own implementation).
Tested:
depthwise_conv_test
BUG=2141