enhance: add dcache invalid ops for aarch64

[liulog]

A flush operation for dcache and a TBLI operation for EL1 were added, and then Icache was cleaned up to ensure that there was no dirty data in the cache when the guest was first executed.

Related with syswonder/hvisor-tool#79 and #239

[liulog]

Test on RK3588 (switch rt-thread to 2,3,4 is okay) has been done.

Verification by others is required.

[ForeverYolo]

A question: if Linux is booted, before executing the first line of Linux assembly, the Cache and MMU are in a disabled state, and the cleanup work is also done by Linux. What is the purpose of doing it this way? @liulog

[liulog]

A question: if Linux is booted, before executing the first line of Linux assembly, the Cache and MMU are in a disabled state, and the cleanup work is also done by Linux. What is the purpose of doing it this way? @liulog

The issue here concerns keeping the VM image in memory clean before it starts, allocating RAM, associated CPU cache, and TLB to the VM.

By default, the VM reads the image from memory early in the startup process. However, in special cases, the image may be in the root zone cpu's private cache. Additionally, if the cache and TLB are not clean, dirty data may accumulate in them during zone restarts, etc. When the VM has cache and MMU translation enabled, it may read previously uncleaned dirty data from the cache and TLB, causing errors.

This is just a precaution; it cannot be guaranteed that all operating systems will clear caches and TLB in the early stages of startup.