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[sonic-mgmt] Update transceiver onboarding HLD to make parameters attribute based #20230
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Feb 12, 2026
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60020f4
Refactor transceiver test plan: Add attribute-based infrastructure
mihirpat1 789053e
Removed unwanted changed in transceiver_onboarding_test_plan.md
mihirpat1 521da12
Added pre-req to validate port speed and RS FEC
mihirpat1 c302602
Added dut_hostname to dut_info filename
mihirpat1 2a97e3a
Added test file hierarchy
mihirpat1 2db306f
Correct typo to eeprom_dump_timeout_sec
mihirpat1 4d7f46c
Updated file hierarchy to add more test group categories
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| # Transceiver Test Plan - Visual Diagrams | ||
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| This directory contains visual diagrams to help understand the complex concepts in the transceiver test plan. | ||
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| ## Available Diagrams | ||
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| ### 1. [File Organization](file_organization.md) | ||
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| - Shows the overall file structure and relationships | ||
| - Illustrates how `dut_info.json` and category attribute files work together | ||
| - Displays the final `port_attributes_dict` structure | ||
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| ### 2. [Data Flow Architecture](data_flow.md) | ||
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| - Comprehensive view of the entire system architecture | ||
| - Sequence diagram showing processing steps | ||
| - Examples of data transformation at each stage | ||
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| ### 3. [Validation Flow](validation_flow.md) | ||
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| - Attribute completeness validation process | ||
| - Template-based validation workflow | ||
| - Pytest integration and execution control | ||
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| ## How to Use These Diagrams | ||
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| 1. **Start with File Organization** to understand the overall structure | ||
| 2. **Reference Data Flow** for end-to-end system understanding | ||
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| These diagrams complement the detailed text in the main test plan document and provide visual clarity for implementation and troubleshooting. |
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| # Data Flow Architecture Diagram | ||
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| ## Overall System Architecture | ||
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| ```mermaid | ||
| graph TB | ||
| subgraph "Input Files" | ||
| A[dut_info.json] | ||
| B[eeprom.json] | ||
| C[system.json] | ||
| D[Other category files...] | ||
| X[(prerequisites.json)] | ||
| end | ||
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| subgraph "Framework Processing" | ||
| E[AttributeManager] | ||
| F[Port Expansion Processor] | ||
| G[Configuration Parser] | ||
| H[Priority Resolver] | ||
| I[Validator] | ||
| end | ||
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| subgraph "Output Structure" | ||
| J[port_attributes_dict] | ||
| K[BASE_ATTRIBUTES] | ||
| L[EEPROM_ATTRIBUTES] | ||
| M[SYSTEM_ATTRIBUTES] | ||
| N[Other Category Attributes] | ||
| end | ||
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| subgraph "Validation (Optional)" | ||
| Q[Deployment Templates] | ||
| R[AttributeCompletenessValidator] | ||
| end | ||
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| subgraph "Test Consumption" | ||
| O[Test Cases] | ||
| P[DUT Host Object] | ||
| end | ||
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| A --> E | ||
| B --> E | ||
| C --> E | ||
| D --> E | ||
| X --> T[Prerequisite Test Runner] | ||
| T --> O | ||
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| E --> F | ||
| F --> G | ||
| G --> H | ||
| H --> I | ||
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| I --> K | ||
| I --> L | ||
| I --> M | ||
| I --> N | ||
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| K --> J | ||
| L --> J | ||
| M --> J | ||
| N --> J | ||
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| J --> R | ||
| Q --> R | ||
| R --> P | ||
| P --> O | ||
| J --> O | ||
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| style A fill:#e1f5fe | ||
| style E fill:#f3e5f5 | ||
| style J fill:#e8f5e8 | ||
| style O fill:#fff3e0 | ||
| ``` | ||
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| ## Detailed Processing Flow | ||
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| ```mermaid | ||
| sequenceDiagram | ||
| participant DI as dut_info.json | ||
| participant AM as AttributeManager | ||
| participant PP as Port Processor | ||
| participant CP as Config Parser | ||
| participant CF as Category Files | ||
| participant PR as Priority Resolver | ||
| participant PD as port_attributes_dict | ||
| participant V as Validator | ||
| participant TC as Test Cases | ||
| participant PRQ as Prerequisites File | ||
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| TC->>AM: Initialize framework & load base data | ||
| AM->>DI: Load dut_info.json | ||
| DI-->>AM: Port specs & metadata | ||
| AM->>PP: Expand port specifications | ||
| PP-->>AM: Expanded port list | ||
| AM->>CP: Parse transceiver configuration strings | ||
| CP-->>AM: Parsed components | ||
| AM->>PD: Seed BASE_ATTRIBUTES per port | ||
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| loop For each category | ||
| TC->>CF: Load category JSON file | ||
| CF-->>TC: Raw category attributes | ||
| TC->>PR: Resolve via 8-level priority hierarchy | ||
| PR-->>TC: Merged CATEGORY_ATTRIBUTES | ||
| TC->>PD: Store CATEGORY_ATTRIBUTES | ||
| opt Attribute Completeness Validation | ||
| PD->>V: Validate against deployment templates | ||
| V-->>PD: Results | ||
| end | ||
| TC->>PRQ: Load category prerequisite list (if present) | ||
| PRQ->>PRQ: Execute prerequisite tests (gating checks) | ||
| PRQ-->>TC: Continue if all pass | ||
| PD-->>TC: Run main category test cases | ||
| end | ||
| ``` | ||
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| ## Data Transformation Examples | ||
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| ### Step 1: Port Expansion | ||
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| ```text | ||
| Input (dut_info.json): | ||
| { | ||
| "dut_name_1": { | ||
| "Ethernet4:7": { | ||
| "vendor_name": "ACME Corp.", | ||
| "transceiver_configuration": "AOC-100-QSFPDD-2x100G_100G_SIDE-0xFF-0xFF" | ||
| } | ||
| } | ||
| } | ||
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| After Port Expansion: | ||
| - Ethernet4: same attributes | ||
| - Ethernet5: same attributes | ||
| - Ethernet6: same attributes | ||
| ``` | ||
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| ### Step 2: Configuration Parsing | ||
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| ```text | ||
| Input: "AOC-100-QSFPDD-2x100G_100G_SIDE-0xFF-0xFF" | ||
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| Parsed Components: | ||
| - cable_type: "AOC" | ||
| - speed_gbps: 100 | ||
| - form_factor: "QSFPDD" | ||
| - deployment: "2x100G_100G_SIDE" | ||
| - media_lane_mask: "0xFF" | ||
| - host_lane_mask: "0xFF" | ||
| - media_lane_count: 8 | ||
| - host_lane_count: 8 | ||
| ``` | ||
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| ### Step 3: Attribute Merging | ||
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| ```text | ||
| For Ethernet4 EEPROM_ATTRIBUTES: | ||
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| Priority Resolution: | ||
| 1. defaults.dual_bank_supported = false | ||
| 2. deployment_configurations.2x100G_100G_SIDE.dual_bank_supported = true ← WINS | ||
| 3. vendor.ACME_CORP.defaults.dual_bank_supported = false | ||
| 4. No higher priority overrides found | ||
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| Result: dual_bank_supported = true | ||
| ``` | ||
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| ### Step 4: Final Structure | ||
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| ```python | ||
| port_attributes_dict = { | ||
| "Ethernet4": { | ||
| "BASE_ATTRIBUTES": { | ||
| "vendor_name": "ACME Corp.", | ||
| "cable_type": "AOC", | ||
| "speed_gbps": 100, | ||
| "deployment": "2x100G_100G_SIDE", | ||
| # ... other parsed fields | ||
| }, | ||
| "EEPROM_ATTRIBUTES": { | ||
| "dual_bank_supported": true, | ||
| "vdm_supported": false, | ||
| # ... other resolved attributes | ||
| }, | ||
| "SYSTEM_ATTRIBUTES": { | ||
| # ... resolved system attributes | ||
| } | ||
| } | ||
| # ... other ports | ||
| } | ||
| ``` | ||
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| ## Key Benefits | ||
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| 1. **Separation of Concerns**: Base hardware data vs. test-specific attributes | ||
| 2. **Modular Design**: Each category file is independent | ||
| 3. **Flexible Overrides**: 8-level priority system handles all scenarios | ||
| 4. **Efficient Grouping**: Port ranges reduce configuration overhead | ||
| 5. **Deployment Patterns**: Shared attributes for similar deployments | ||
| 6. **Extensible**: Easy to add new categories and attributes | ||
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@mihirpat1 did we add the debug log which can be turned ON when necessary to see this final structure?