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[Mellanox] Update DSCP mapping for SN5600, SN5610 SKUs #21762

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Merged
liat-grozovik merged 1 commit into from
Feb 19, 2025
Merged

[Mellanox] Update DSCP mapping for SN5600, SN5610 SKUs #21762

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8 changes: 4 additions & 4 deletions device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
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Original file line number Diff line number Diff line change
Expand Up @@ -155,22 +155,22 @@
},
{% endfor %}
{% for port in port_names_active.split(',') %}
"{{ port }}|1-2": {
"{{ port }}|1-3": {
"profile" : "q_lossy_minus_7_profile"
},
{% endfor %}
{% for port in port_names_active.split(',') %}
"{{ port }}|3": {
"{{ port }}|4": {
"profile" : "q_lossy_profile"
},
{% endfor %}
{% for port in port_names_active.split(',') %}
"{{ port }}|4": {
"{{ port }}|5": {
"profile" : "q_lossy_minus_3_profile"
},
{% endfor %}
{% for port in port_names_active.split(',') %}
"{{ port }}|5-6": {
"{{ port }}|6": {
"profile" : "q_lossy_profile"
}{% if not loop.last %},{% endif %}

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102 changes: 51 additions & 51 deletions device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
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Expand Up @@ -16,47 +16,47 @@
{%- macro generate_dscp_to_tc_map_per_sku() -%}
"DSCP_TO_TC_MAP": {
"AZURE": {
"0" : "6",
"0" : "0",
"1" : "1",
"2" : "2",
"3" : "3",
"4" : "3",
"5" : "4",
"6" : "5",
"2" : "1",
"3" : "2",
"4" : "2",
"5" : "3",
"6" : "3",
"7" : "0",
"8" : "0",
"9" : "0",
"10": "0",
"11": "0",
"12": "0",
"13": "0",
"14": "0",
"15": "0",
"16": "0",
"17": "0",
"18": "0",
"19": "0",
"20": "0",
"21": "0",
"22": "0",
"23": "0",
"24": "0",
"25": "0",
"26": "0",
"27": "0",
"28": "0",
"29": "0",
"30": "0",
"31": "0",
"32": "0",
"33": "0",
"34": "0",
"35": "0",
"36": "0",
"37": "0",
"38": "0",
"39": "0",
"40": "0",
"11": "4",
"12": "4",
"13": "4",
"14": "4",
"15": "4",
"16": "4",
"17": "4",
"18": "4",
"19": "4",
"20": "4",
"21": "4",
"22": "4",
"23": "4",
"24": "4",
"25": "4",
"26": "4",
"27": "4",
"28": "4",
"29": "4",
"30": "4",
"31": "5",
"32": "5",
"33": "5",
"34": "5",
"35": "5",
"36": "5",
"37": "5",
"38": "5",
"39": "5",
"40": "5",
"41": "0",
"42": "0",
"43": "0",
Expand Down Expand Up @@ -100,46 +100,46 @@

{%- macro generate_scheduler_per_sku() -%}
"SCHEDULER": {
"scheduler.1": {
"scheduler.4": {
"type" : "DWRR",
"weight": "1"
"weight": "4"
},
"scheduler.10": {
"scheduler.8": {
"type" : "DWRR",
"weight": "10"
"weight": "8"
},
"scheduler.12": {
"scheduler.18": {
"type" : "DWRR",
"weight": "12"
"weight": "18"
},
"scheduler.32": {
"scheduler.22": {
"type" : "DWRR",
"weight": "32"
"weight": "22"
}
},
{%- endmacro -%}

{%- macro generate_single_queue_per_sku(port) -%}
"{{ port }}|0": {
"scheduler": "scheduler.1"
"scheduler": "scheduler.4"
},
"{{ port }}|1": {
"scheduler": "scheduler.10"
"scheduler": "scheduler.8"
},
"{{ port }}|2": {
"scheduler": "scheduler.12"
"scheduler": "scheduler.18"
},
"{{ port }}|3": {
"scheduler": "scheduler.12"
"scheduler": "scheduler.22"
},
"{{ port }}|4": {
"scheduler": "scheduler.32"
"scheduler": "scheduler.22"
},
"{{ port }}|5": {
"scheduler": "scheduler.32"
"scheduler": "scheduler.22"
},
"{{ port }}|6": {
"scheduler": "scheduler.1"
"scheduler": "scheduler.4"
}
{%- endmacro -%}

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2 changes: 1 addition & 1 deletion device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_objects.j2
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@@ -1 +1 @@
../Mellanox-SN5610N-C256S2/buffers_defaults_objects.j2
../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
2 changes: 1 addition & 1 deletion device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/qos.json.j2
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@@ -1 +1 @@
../Mellanox-SN5610N-C256S2/qos.json.j2
../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
213 changes: 0 additions & 213 deletions device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_objects.j2
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This file was deleted.

1 change: 1 addition & 0 deletions device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_objects.j2
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@@ -0,0 +1 @@
../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
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