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[action] [PR:12605] [Mellanox] Support DSCP remapping in dual ToR topo on T0 switch#13787

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mssonicbld merged 1 commit intosonic-net:202211from
mssonicbld:cherry/202211/12605
Feb 14, 2023
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[action] [PR:12605] [Mellanox] Support DSCP remapping in dual ToR topo on T0 switch#13787
mssonicbld merged 1 commit intosonic-net:202211from
mssonicbld:cherry/202211/12605

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…c-net#12605)

- Why I did it
Support DSCP remapping in dual ToR topo on T0 switch for SKU Mellanox-SN4600c-C64, Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8.

- How I did it
Regarding buffer settings, originally, there are two lossless PGs and queues 3, 4. In dual ToR scenario, the lossless traffic from the leaf switch to the uplink of the ToR switch can be bounced back.
To avoid PFC deadlock, we need to map the bounce-back lossless traffic to different PGs and queues. Therefore, 2 additional lossless PGs and queues are allocated on uplink ports on ToR switches.

On uplink ports, map DSCP 2/6 to TC 2/6 respectively
On downlink ports, both DSCP 2/6 are still mapped to TC 1
Buffer adjusted according to the ports information:
Mellanox-SN4600c-C64:
56 downlinks 50G + 8 uplinks 100G
Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8:
24 downlinks 50G + 8 uplinks 100G

- How to verify it
Unit test.

Signed-off-by: Stephen Sun <[email protected]>
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Original PR: #12605

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Commenter does not have sufficient privileges for PR 13787 in repo sonic-net/sonic-buildimage

@mssonicbld mssonicbld merged commit d1de964 into sonic-net:202211 Feb 14, 2023
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