Add two extra lossless queues for bounced back traffic#10496
Add two extra lossless queues for bounced back traffic#10496neethajohn merged 18 commits intosonic-net:masterfrom
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Signed-off-by: bingwang <[email protected]>
Signed-off-by: bingwang <[email protected]>
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can we have an enable/disable flag for this feature? |
Do you mean a flag for these extra queues, or the whole QoS remapping feature? If the flag |
I drafted a HLD for adding a |
Signed-off-by: bingwang <[email protected]>
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Signed-off-by: bingwang <[email protected]>
device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers.json.j2
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Signed-off-by: bingwang <[email protected]>
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Signed-off-by: bingwang <[email protected]>
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@stephenxs @neethajohn The last commit introduced the |
@bingwang-ms @neethajohn
Taking T1 uplinks as an example, we do not have traffic with DSCP 2/6 (mapping to TC 2/6) received on uplink ports. Even if there are such TC => PG mappings, we do not need to allocate buffer for those PGs, right? |
Signed-off-by: bingwang <[email protected]>
Make sense. There will be no traffic going lossy PG 2 and 6 of T1 uplink ports. I have removed the change. Thanks |
device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32/buffers_defaults_t0.j2
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Signed-off-by: bingwang <[email protected]>
Signed-off-by: bingwang <[email protected]>
Signed-off-by: bingwang <[email protected]>
Signed-off-by: bingwang <[email protected]> Why I did it This PR is to add two extra lossless queues for bounced back traffic. HLD sonic-net/SONiC#950 SKUs include Arista-7050CX3-32S-C32 Arista-7050CX3-32S-D48C8 Arista-7260CX3-D108C8 Arista-7260CX3-C64 Arista-7260CX3-Q64 How I did it Update the buffers.json.j2 template and buffers_config.j2 template to generate new BUFFER_QUEUE table. For T1 devices, queue 2 and queue 6 are set as lossless queues on T0 facing ports. For T0 devices, queue 2 and queue 6 are set as lossless queues on T1 facing ports. Queue 7 is added as a new lossy queue as DSCP 48 is mapped to TC 7, and then mapped into Queue 7 How to verify it Verified by UT Verified by coping the new template and generate buffer config with sonic-cfggen
Signed-off-by: bingwang <[email protected]> Why I did it This PR is to add two extra lossless queues for bounced back traffic. HLD sonic-net/SONiC#950 SKUs include Arista-7050CX3-32S-C32 Arista-7050CX3-32S-D48C8 Arista-7260CX3-D108C8 Arista-7260CX3-C64 Arista-7260CX3-Q64 How I did it Update the buffers.json.j2 template and buffers_config.j2 template to generate new BUFFER_QUEUE table. For T1 devices, queue 2 and queue 6 are set as lossless queues on T0 facing ports. For T0 devices, queue 2 and queue 6 are set as lossless queues on T1 facing ports. Queue 7 is added as a new lossy queue as DSCP 48 is mapped to TC 7, and then mapped into Queue 7 How to verify it Verified by UT Verified by coping the new template and generate buffer config with sonic-cfggen
Why I did it
This PR is to add two extra lossless queues for bounced back traffic.
HLD sonic-net/SONiC#950
SKUs include
How I did it
Update the
buffers.json.j2template andbuffers_config.j2template to generate newBUFFER_QUEUEtable.2and queue6are set as lossless queues on T0 facing ports.2and queue6are set as lossless queues on T1 facing ports.How to verify it
sonic-cfggenWhich release branch to backport (provide reason below if selected)
Description for the changelog
This PR is to add two extra lossless queues for bounced back traffic.
Link to config_db schema for YANG module changes
A picture of a cute animal (not mandatory but encouraged)