PMON High Level Design for SmartSwitch (Replaces the PR #1538)#1584
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prgeor merged 63 commits intosonic-net:masterfrom May 12, 2024
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PMON High Level Design for SmartSwitch (Replaces the PR #1538)#1584prgeor merged 63 commits intosonic-net:masterfrom
prgeor merged 63 commits intosonic-net:masterfrom
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This commit is the HLD document for SmartSwitch PMON 202405 release and needs to be shared with the the community. This is the initial draft
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oleksandrivantsiv
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vvolam
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more clarity to dpi_id and dpu_name
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| #### 3.1.3 NPU to DPU port mapping | ||
| platform.json of NPU/switch will show the NPU port to DPU port mapping. This will be used by services early in the system boot for midplane IP assignment. In this example there are 8 DPUs and ach having a 200G interface. | ||
| ``` | ||
| "DPUs" : [ |
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as commented (minor change requrest)
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@rameshraghupathy Please add a section for
- Console access of DPUs
- Firmware upgrade of different DPU components.
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The following 4 PRs have been raised for PMON Platform Independent changes: |
ChassisStateDB has been called out, mentioned that the console management design will be covered in another document.
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PMON High Level Design for SmartSwitch (Replaces the initial PR #1538 #1538)
The following 4 PRs have been raised for PMON Platform Independent changes:
sonic-net/sonic-buildimage#18676
sonic-net/sonic-platform-daemons#467
sonic-net/sonic-platform-common#454
sonic-net/sonic-utilities#3271