Add new Tier-3 target: riscv64im-unknown-none-elf

[kevaundray]

This PR proposes to add riscv64im-unknown-none-elf, a subset of the already supported riscv64imac-unknown-none-elf.

The motivation behind this PR is that we want to standardize (most) zkVMs on riscv64im-none and riscv64ima-none. Having different variants of riscv extensions, also seems to be within expectation, atleast with respects to riscv32.

Note: This does not mean that we will be able to remove riscv32im-risc0-zkvm-elf -- I am not aware of all of the dependents for this

Tier-3 Policy

A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

I assigned Rust Embedded Working Group, since they are already maintaining riscv64IMAC, though I am happy to assign myself.

Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.

It follows the naming convention of the other bare metal riscv targets

Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.

This has the same requirements as riscv{32, 64}imac

Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.

Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions.

The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary.

Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via @) to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.

Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.

Tier 3 targets must be able to produce assembly using at least one of rustc's supported backends from any host target. (Having support in a fork of the backend is not sufficient, it must be upstream.)

Acknowledging the above.

[rustbot]

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

[rustbot]

r? @lcnr

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They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

[kevaundray]

r? compiler

[JonathanBrouwer]

A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

I assigned Rust Embedded Working Group, since they are already maintaining riscv64IMAC, though I am happy to assign myself.

@almindor @dkhayes117 @romancardenas @MabezDev @jessebraham @rmsyn
Rust Embedded Working Group, are you ok with being the maintainers of this target?

[romancardenas]

Ok from my side!

[rmsyn]

Is there any hardware implementing this spec outside of FPGA? This really looks like something an implementation would reach for rv64e.

Regardless, since it's a strict subset of riscv64imac, it should be relatively easy to maintain.

[kevaundray]

I mentioned it a little in the PR body; the target is currently zkVMs -- do you mean rv32e(Tier 3) or was you referring to possibly adding rv64e as a target?

[kevaundray]

M is needed for efficient multiplication: theres a little blurb on the proposal to standardize rv64im here: https://github.com/eth-act/zkvm-standards/blob/main/standards/riscv-target/target.md

[MabezDev]

Okay from my side :).

[JonathanBrouwer]

@rustbot author

Will probably also give this to another compiler team member after you're processed my review, because this is my first time reviewing a new tier-3 target, and wanna make sure I'm not missing anything.

[rustbot]

Reminder, once the PR becomes ready for a review, use @rustbot ready.

[kevaundray]

@rustbot ready

Left a clarifying question re the diff between this and rv32{e,em}

[Noratrieb]

following https://forge.rust-lang.org/compiler/proposals-and-stabilization.html#targets, this needs a compiler lead approval, so
r? compiler-leads

[Noratrieb]

r? compiler_leads 😔

[kevaundray]

r? compiler_leads 😔

Should the docs be updated? https://doc.rust-lang.org/rustc/target-tier-policy.html#adding-a-new-target

It currently says to use r? compiler

[davidtwco]

This looks good to me. I'll wait a bit longer just to check if the embedded risc-v group are happy to be the maintainers, but otherwise this is fine.

View changes since this review

[kevaundray]

r? @davidtwco

[rustbot]

No reviewers could be found from initial request compiler_leads
This repo may be misconfigured.
Use r? to specify someone else to assign.

[rustbot]

Requested reviewer is already assigned to this pull request.

Please choose another assignee.

[kevaundray]

r=me once rebased

seems I cannot r? you again since you've already been assigned

[rustbot]

Failed to set assignee to you: invalid assignee

Note: Only org members with at least the repository "read" role, users with write permissions, or people who have commented on the PR may be assigned.

[JonathanBrouwer]

@bors r=davidtwco,JonathanBrouwer rollup

(The r=me comment means that David approves this PR to be merged after it is rebased)

[bors]

📌 Commit 9ba7852 has been approved by davidtwco,JonathanBrouwer

It is now in the queue for this repository.