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introduce kernel for converting e4m3fn kv_cache to e4m3fnuz#4113

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introduce kernel for converting e4m3fn kv_cache to e4m3fnuz#4113
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@bradleyhd bradleyhd commented May 12, 2025

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Summary:
X-link: https://github.com/facebookresearch/FBGEMM/pull/1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334

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This pull request was exported from Phabricator. Differential Revision: D74502334

bradleyhd added a commit to bradleyhd/FBGEMM that referenced this pull request May 12, 2025
…4113)

Summary:

X-link: facebookresearch/FBGEMM#1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

This is a first step of introducing the kernel only. A follow up step will be to wire it into DisaggDecodeCommunicator and ensure the qparam tensor shape matches, etc.

**NB: this is my first CUDA kernel ever, so please review carefully**

Differential Revision: D74502334
bradleyhd added a commit to bradleyhd/FBGEMM that referenced this pull request May 12, 2025
…4113)

Summary:

X-link: facebookresearch/FBGEMM#1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334
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This pull request was exported from Phabricator. Differential Revision: D74502334

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This pull request was exported from Phabricator. Differential Revision: D74502334

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This pull request was exported from Phabricator. Differential Revision: D74502334

bradleyhd added a commit to bradleyhd/FBGEMM that referenced this pull request May 12, 2025
…4113)

Summary:
Pull Request resolved: pytorch#4113

X-link: https://github.com/facebookresearch/FBGEMM/pull/1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334
@bradleyhd bradleyhd force-pushed the export-D74502334 branch 2 times, most recently from 4e780a4 to 9931f52 Compare May 13, 2025 18:00
bradleyhd added a commit to bradleyhd/FBGEMM that referenced this pull request May 13, 2025
…4113)

Summary:

X-link: facebookresearch/FBGEMM#1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334
bradleyhd added a commit to bradleyhd/FBGEMM that referenced this pull request May 13, 2025
…4113)

Summary:

X-link: facebookresearch/FBGEMM#1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334
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This pull request was exported from Phabricator. Differential Revision: D74502334

1 similar comment
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This pull request was exported from Phabricator. Differential Revision: D74502334

…4113)

Summary:
Pull Request resolved: pytorch#4113

X-link: https://github.com/facebookresearch/FBGEMM/pull/1197

As titled. NV uses e4m3fn for fp8 KV cache, and AMD uses e4m3fnuz. If we want to do HH serving with NV prefill and AMD decode, we need a way to convert between the two.

In practice this can be done with two operations: overwriting -0 (which are valid in e4m3fn but not in uz) with +0, and multiplying the scale qparam by 2, since the exponent bias differs by 1 between the two formats. The scale qparam is packed as the low bits of a __half2 (fp16x2).

Differential Revision: D74502334
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This pull request was exported from Phabricator. Differential Revision: D74502334

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This pull request has been merged in 40259b2.

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