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Fix incorrect bitfield name in ADC_Init #220

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Fix incorrect bitfield name in ADC_Init #220

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11 changes: 7 additions & 4 deletions drivers/lpc_adc/fsl_adc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,13 @@ void ADC_Init(ADC_Type *base, const adc_config_t *config)
tmp32 |= ADC_CTRL_TSAMP(config->sampleTimeNumber);
#if (defined(FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL) && FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL)
}
else
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@ZhaoxiangJin ZhaoxiangJin Dec 4, 2024

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Hello @tcv-git, thanks for your effort. I'd like to know what ADC clock mode in your project? From the K32W0 user manual information, the device doesn't support synchronous mode, and the ADC sample time is determined by GPADC_CTRL0[GPADC_TSAMP], the CTRL[TSAMP] should stay to default during application. So, for your patch, in asynchronous mode, you have no way to set the GPADC_CTRL0[GPADC_TSAMP].
Could you please close this PR? as we need to do internal devices feature header and driver update to fix this bug.

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@tcv-git tcv-git Dec 4, 2024

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Hi,

The device does support synchronous mode. See UM11323 Fig. 82. Perhaps you are reading the manual for another part?

I have set CLOCK_AttachClk(kNONE_to_ADC_CLK); and .clockMode = kADC_ClockSynchronousMode,. It is reading values correctly using the code fixed code I have supplied.

Have you tried this with hardware?

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@tcv-git tcv-git Dec 4, 2024

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By the way, I have seen the part that you are referring to in section 17.1.2 of the register manual. The lack of correct punctuation and the fact that it contradicts the sentence immediately before and after it make It looks like a copy+paste error. Perhaps you could arrange for the manual to be updated.

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@ZhaoxiangJin ZhaoxiangJin Dec 5, 2024

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Hello @tcv-git, yes, I have tried both synchronous mode and asynchronous mode on my local, ADC can convert in both modes. I checked with the internal team, it is strongly recommended you use asynchronous mode, using synchronous mode may result in reduced accuracy in some environments. The UM11323 needs to be updated to hide information about synchronous mode. We currently only describe related information in CTRL[ASYNMODE] and CTRL[CLKDIV] bitfield description field.

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@tcv-git tcv-git Dec 5, 2024

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Hi Zhaoxiang,

Thankyou for your help. Both the pdf documentation and example projects in the SDK need to be updated because they all use synchronous mode. Can you also please confirm that this will be published in the device errata document? because many customers will have already written applications based on the pre-existing examples.

More importantly for me, if you look for the function update_ctrl0_adc_register in board_utility.c, it modifies the sample time in the GPADC_CTRL0 register. If this is required to be changed to synchronous mode then the sample time will have to be made in the CTRL register and I need to know which values to use to replace 0x1f and 0x14.

Thanks,
Tom

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@tcv-git tcv-git Dec 9, 2024

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Hi Zhaoxiang,

Yes we can use asynchronous mode with a 4MHz clock. I was only trying to save a small amount of power by using synchronous mode.

After the updated SDK is available I am happy for you to reject this pull request.

Thanks,
Tom

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@ckielstra ckielstra Jan 23, 2025

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From the K32W0 user manual information, the device doesn't support synchronous mode

@ZhaoxiangJin I can't find this mentioned in the manual UM11323 rev. 1.2, the most recent version available for download on the NXP website.
For example chapter 27.6.5 states: "Two clocking modes are available, synchronous mode and asynchronous mode"

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@ZhaoxiangJin ZhaoxiangJin Jan 24, 2025

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From the K32W0 user manual information, the device doesn't support synchronous mode

@ZhaoxiangJin I can't find this mentioned in the manual UM11323 rev. 1.2, the most recent version available for download on the NXP website. For example chapter 27.6.5 states: "Two clocking modes are available, synchronous mode and asynchronous mode"

Hello @ckielstra, please refer UM11323 Rev. 1.2 Register Manual ADC chapter CTRL register ASYNMODE bitfield description. The synchronous mode related description in User Manual chapter 27 will be removed.

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@ckielstra ckielstra Jan 24, 2025

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The synchronous mode related description in User Manual chapter 27 will be removed.

@ZhaoxiangJin Can the example drivers be updated as well? The four examples under SDK_2_6_15_K32W041\boards\k32w061dk6\driver_examples\adc all use synchronous mode

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@ZhaoxiangJin ZhaoxiangJin Jan 24, 2025

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The synchronous mode related description in User Manual chapter 27 will be removed.

@ZhaoxiangJin Can the example drivers be updated as well? The four examples under SDK_2_6_15_K32W041\boards\k32w061dk6\driver_examples\adc all use synchronous mode

Hello @ckielstra, yes, both driver and driver examples will be updated in the in the next release.

{
uint32_t tmp_ctrl0 = base->GPADC_CTRL0;
tmp_ctrl0 &= ~ADC_GPADC_CTRL0_GPADC_TSAMP_MASK;
tmp_ctrl0 |= ADC_GPADC_CTRL0_GPADC_TSAMP(config->sampleTimeNumber);
base->GPADC_CTRL0 = tmp_ctrl0;
}
#endif /* FSL_FEATURE_ADC_SYNCHRONOUS_USE_GPADC_CTRL */
#endif /* FSL_FEATURE_ADC_HAS_CTRL_TSAMP. */
#if defined(FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE) & FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE
Expand All @@ -109,10 +116,6 @@ void ADC_Init(ADC_Type *base, const adc_config_t *config)

#if defined(FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN) && FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN
base->GPADC_CTRL0 |= ADC_GPADC_CTRL0_LDO_POWER_EN_MASK;
if (config->clockMode == kADC_ClockSynchronousMode)
{
base->GPADC_CTRL0 |= ADC_GPADC_CTRL0_PASS_ENABLE(config->sampleTimeNumber);
}
SDK_DelayAtLeastUs(300, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
#endif /* FSL_FEATURE_ADC_HAS_GPADC_CTRL0_LDO_POWER_EN */

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