Do not duplicate assertion payloads for Brillig functions

[vezenovm]

Problem

We duplicate assertion messages for all Brillig calls that are inserted from generated brillig into our generated ACIR

noir/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs

Line 593 in 19ffa20

for (brillig_index, message) in generated_brillig.assert_messages.iter() {

.

Happy Case

Similarly to our deduplication of Brillig bytecode with the BrilligCall opcode and Brillig debug locations we should also deduplicate the Brillig assertion payloads so to not repeat them as part of ACIR.

We should note though that assertion payloads are included as part of the Circuit struct and resolved using that. This is necessary for ACIR but we should be able to split out unconstrained functionality. Either way, this is a breaking serialization change.

Workaround

Yes

Workaround Description

No response

Additional Context

No response

Project Impact

None

Blocker Context

No response

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Support Needs

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