[KernelDispatch] Add a temporary hack for 1x1 shapes with tile sizes M,N#1276
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Abhishek-Varma wants to merge 3 commits into
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[KernelDispatch] Add a temporary hack for 1x1 shapes with tile sizes M,N#1276Abhishek-Varma wants to merge 3 commits into
Abhishek-Varma wants to merge 3 commits into
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Abhishek-Varma
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| // TODO(avarma): This is currently a workaround for 1x1 AIE array to make | ||
| // those 2D matmul shapes work for which all of the operands get pulled in | ||
| // to L2 buffer. Once reprogramming of DMA ops is supported, we can get rid |
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I didn't follow what's the problem here. What's the error message?
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Without this we get 'aie.memtile_dma' op could not find and assign a valid BD id - because of exploding memtile_dma issue, which should be solved by having DMA ops reconfigured. But since the support is not yet available, this is a temporary workaround.
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-- This commit adds a temporary hack for 1x1 AIE array to make those 2D matmul shapes work for which all of the operands get pulled in to L2 buffer. Once reprogramming of DMA ops is supported, we can get rid of this workaround. We need to add this only for pack-peel-4-level-tiling NOT pack-peel. The workaround just ensures that the tile size of first level is NOT equal to M,N by halving the n0Tile. -- Also adds e2e 32x512x64 for 1x1 npu4 test. Signed-off-by: Abhishek Varma <[email protected]>
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| // of this workaround. We need to add this only for pack-peel-4-level-tiling | ||
| // NOT pack-peel. The workaround just ensures that the tile size of first | ||
| // level is NOT equal to M, N by halving the N0 tile. | ||
| if (numRows == 1 && numCols == 1) { |
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Do you only see this issue for 1x1? I would expect it for any number of cores?
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-- This commit adds a temporary hack for 1x1 AIE array to make those
2D matmul shapes work for which all of the operands get pulled in to L2
buffer. Once reprogramming of DMA ops is supported, we can get rid of this
workaround. We need to add this only for pack-peel-4-level-tiling NOT
pack-peel. The workaround just ensures that the tile size of first level is
NOT equal to M,N by halving the n0Tile and halving the corresponding packing
size in case n0Tile becomes lesser than the packing size.
-- Also adds e2e 32x512x64 for 1x1 npu4 test.
Signed-off-by: Abhishek Varma [email protected]