Skip to content
Draft
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 9 additions & 5 deletions examples/simple_system/rtl/ibex_simple_system.sv
Original file line number Diff line number Diff line change
Expand Up @@ -97,10 +97,13 @@ module ibex_simple_system (
logic device_err [NrDevices];

// Device address mapping
localparam int unsigned RAMBaseAddr = 32'h100000;
localparam int unsigned RAMCapacity = 32'h100000; // 1 MB

logic [31:0] cfg_device_addr_base [NrDevices];
logic [31:0] cfg_device_addr_mask [NrDevices];
assign cfg_device_addr_base[Ram] = 32'h100000;
assign cfg_device_addr_mask[Ram] = ~32'hFFFFF; // 1 MB
assign cfg_device_addr_base[Ram] = RAMBaseAddr;
assign cfg_device_addr_mask[Ram] = ~(RAMCapacity - 1);
assign cfg_device_addr_base[SimCtrl] = 32'h20000;
assign cfg_device_addr_mask[SimCtrl] = ~32'h3FF; // 1 kB
assign cfg_device_addr_base[Timer] = 32'h30000;
Expand All @@ -114,9 +117,6 @@ module ibex_simple_system (
logic [31:0] instr_rdata;
logic instr_err;

assign instr_gnt = instr_req;
assign instr_err = '0;

`ifdef VERILATOR
assign clk_sys = IO_CLK;
assign rst_sys_n = IO_RST_N;
Expand Down Expand Up @@ -262,6 +262,10 @@ module ibex_simple_system (
.core_sleep_o ()
);

assign instr_gnt = instr_req;
assign instr_err = (instr_addr & cfg_device_addr_mask[Ram]) !=
cfg_device_addr_base[Ram];

// SRAM block for instruction and data storage
ram_2p #(
.Depth(1024*1024/4),
Expand Down