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[WIP] MIF support #2136

@tangxifan

Description

@tangxifan

Is your feature request related to a problem? Please describe.
Memory Initialization File (MIF) is commonly used by FPGA design tools, to initialize Block RAM with proper values.

To enable such feature, both hardware and software support are required.

  • The embedded RAM block should support initialization through dedicated protocols (Defer bitstream as the RAM size can be crazy big, like 36k-bit, causing large bitstream file sizes).
  • The design tool supports MIF through which user can specify the initial values for part of or the whole RAM block at any location of an FPGA.
  • The design tool can output testbenches (both full testbench and preconfigured testbench) which load MIF content and validate the process where RAMs are initialized.

Therefore, this requires hardware and software to be tightly co-integrated, which should be handled by the OpenFPGA framework.

Describe the solution you'd like

As stated, this task requires the following subtasks

  • Develop the RTL for a RAM block which supports memory initialization, based on an existing one: link
  • New command 'read_mif'
    • Option '--file' to specify the MIF file
    • This command should be called before 'link_arch'
    • This command can be called multiple times, enabling MIF data aggregation
  • New command 'write_mif'
    • Option '--file' to specify the MIF file. If there are multiple MIF files as inputs, all their content will be outputted to the file

When MIF is enabled,

  • the full testbench should include dedicated cycles before downloading bitstream.
  • the preconfigured testbench should force bits to dedicated internal ports of BRAM block.

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