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[RISCV] Disable gp relaxation if part of object unreachable #72655

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[RISCV] Disable gp relaxation if part of object unreachable #72655

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61f44ad
[RISCV] Disable gp relaxation if part of object unreachable
Nov 17, 2023
0a64d43
Address review comments
Nov 27, 2023
b8bd95f
Run clang-format.
Nov 27, 2023
c4667aa
Consolidate tests into a single file.
Nov 27, 2023
075b209
Simplify relaxation decision
Jan 4, 2024
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14 changes: 14 additions & 0 deletions lld/ELF/Arch/RISCV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -651,6 +651,20 @@ static void relaxHi20Lo12(const InputSection &sec, size_t i, uint64_t loc,
if (!isInt<12>(r.sym->getVA(r.addend) - gp->getVA()))
return;

// The symbol may be accessed in multiple pieces. We need to make sure that
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@MaskRay MaskRay Nov 22, 2023

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The symbol may be accessed in multiple pieces with different addends.

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@nemanjai nemanjai Nov 27, 2023

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Fixed. Thanks.

// all of the possible accesses are relaxed or none are. This prevents
// relaxing the hi relocation and being unable to relax one of the low
// relocations. The compiler will only access multiple pieces of an object
// with low relocations on the memory op if the alignment allows it.
// Therefore it should suffice to check that the smaller of the alignment
// and size can be reached from GP.
uint32_t alignAdjust =
r.sym->getOutputSection() ? r.sym->getOutputSection()->addralign : 0;
alignAdjust = std::min<uint32_t>(alignAdjust, r.sym->getSize());
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@MaskRay MaskRay Nov 22, 2023

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alignAdjust = std::min<uint32_t>(alignAdjust, r.sym->getSize()); is not tested

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@nemanjai nemanjai Nov 27, 2023

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Ah yes, I added a test now.

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@MaskRay MaskRay Dec 15, 2023

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If addend < st_size, it seems that this can be improved to min(addralign, st_size-addend)

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@nemanjai nemanjai Dec 18, 2023

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Ah, yes, I think that is indeed the case.

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@nemanjai nemanjai Jan 3, 2024

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Actually, this is only true if we assume that the addend on the LO12 will be equal or greater than the addend on the HI20.
Ultimately, we need to ensure that the entire window of
min(st_size, st_align) bytes that contains the relocation is reachable from GP.


if (!isInt<12>(r.sym->getVA() + alignAdjust - gp->getVA()))
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@MaskRay MaskRay Nov 22, 2023

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This condition guards against

lui     a1, %hi(var)
lw      a0, %lo(var)(a1)
lw      a1, %lo(var+4)(a1)

but not

lui     a1, %hi(var+4)
lw      a0, %lo(var+4)(a1)
lw      a1, %lo(var)(a1)

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@nemanjai nemanjai Nov 27, 2023

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This is absolutely true. If the addend on the HI20 is higher than the addend on the LO12, there is no guarantee whatsoever that we can't get into the same situation (relaxing and removing the HI instruction even though we need it for the LO instruction). Of course, this isn't new with this patch, the issue already existed.
I think that to be on the safe side, we should reject a relaxation of the HI20 if the addend is non-zero. What do you think?

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@nemanjai nemanjai Nov 27, 2023

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I actually opted to just check the range of +/- adjustment since any LO12 relocations that depend on this are only allowed to access this range.

return;

switch (r.type) {
case R_RISCV_HI20:
// Remove lui rd, %hi20(x).
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58 changes: 58 additions & 0 deletions lld/test/ELF/riscv-relax-gp-partial.s
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@@ -0,0 +1,58 @@
# REQUIRES: riscv
# RUN: rm -rf %t && split-file %s %t && cd %t

# RUN: llvm-mc -filetype=obj -triple=riscv32-unknown-elf -mattr=+relax a.s -o rv32.o
# RUN: llvm-mc -filetype=obj -triple=riscv64-unknown-elf -mattr=+relax a.s -o rv64.o

# RUN: ld.lld --relax-gp --undefined=__global_pointer$ rv32.o lds -o rv32
# RUN: ld.lld --relax-gp --undefined=__global_pointer$ rv64.o lds -o rv64
# RUN: llvm-objdump -td -M no-aliases --no-show-raw-insn rv32 | FileCheck %s
# RUN: llvm-objdump -td -M no-aliases --no-show-raw-insn rv64 | FileCheck %s

# CHECK: 00000080 l .data {{0+}}08 Var0
# CHECK: 00001000 l .data {{0+}}80 Var1
# CHECK: 00000815 g .sdata {{0+}}00 __global_pointer$

# CHECK: <_start>:
# CHECK-NOT: lui
# CHECK-NEXT: lw a0, -1941(gp)
# CHECK-NEXT: lw a1, -1937(gp)
# CHECK-NEXT: lui a1, 1
# CHECK-NEXT: lw a0, 0(a1)
# CHECK-NEXT: lw a1, 124(a1)

#--- a.s
.global _start
_start:
lui a1, %hi(Var0)
lw a0, %lo(Var0)(a1)
lw a1, %lo(Var0+4)(a1)
lui a1, %hi(Var1)
lw a0, %lo(Var1)(a1) # First part is reachable from gp
lw a1, %lo(Var1+124)(a1) # The second part is not reachable

.section .rodata
foo:
.space 1
.section .sdata,"aw"
.space 1
.section .data,"aw"
.p2align 3
Var0:
.quad 0
.size Var0, 8
.space 3960
.p2align 7
Var1:
.quad 0
.zero 120
.size Var1, 128

#--- lds
SECTIONS {
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@MaskRay MaskRay Nov 22, 2023

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Place SECTIONS at column 0 and indent the body by 2.

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@nemanjai nemanjai Nov 27, 2023

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Oh, yup. Sorry.

.text : { }
.rodata : { }
.sdata : { }
.sbss : { }
.data : { }
}