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fixes #152863

Tests were written with some help from Copilot

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llvmbot commented Aug 19, 2025

@llvm/pr-subscribers-backend-spir-v

Author: Simeon David Schaub (simeonschaub)

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fixes #152863

Tests were written with some help from Copilot


Full diff: https://github.com/llvm/llvm-project/pull/154297.diff

2 Files Affected:

  • (modified) llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp (+1-2)
  • (added) llvm/test/CodeGen/SPIRV/AtomicCompareExchange64BitPhiNode.ll (+35)
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index e6e86b71b2dcc..2abd9d36f7606 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -802,10 +802,9 @@ static bool buildAtomicCompareExchangeInst(
     MRI->setRegClass(Tmp, GR->getRegClass(SpvDesiredTy));
   GR->assignSPIRVTypeToVReg(SpvDesiredTy, Tmp, MIRBuilder.getMF());
 
-  SPIRVType *IntTy = GR->getOrCreateSPIRVIntegerType(32, MIRBuilder);
   MIRBuilder.buildInstr(Opcode)
       .addDef(Tmp)
-      .addUse(GR->getSPIRVTypeID(IntTy))
+      .addUse(GR->getSPIRVTypeID(SpvDesiredTy))
       .addUse(ObjectPtr)
       .addUse(ScopeReg)
       .addUse(MemSemEqualReg)
diff --git a/llvm/test/CodeGen/SPIRV/AtomicCompareExchange64BitPhiNode.ll b/llvm/test/CodeGen/SPIRV/AtomicCompareExchange64BitPhiNode.ll
new file mode 100644
index 0000000000000..63023c63958d9
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/AtomicCompareExchange64BitPhiNode.ll
@@ -0,0 +1,35 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o %t.spv -filetype=obj
+; RUN: spirv-val %t.spv
+
+; Regression test for issue https://github.com/llvm/llvm-project/issues/152863
+; Ensure OpAtomicCompareExchange returns the correct i64 type when used in phi nodes.
+; Previously, this would generate invalid SPIR-V where the atomic operation returned
+; uint (32-bit) but the phi node expected ulong (64-bit), causing validation errors.
+
+; CHECK-SPIRV-DAG: %[[#Long:]] = OpTypeInt 64 0
+; CHECK-SPIRV-DAG: %[[#Ptr:]] = OpTypePointer CrossWorkgroup %[[#Long]]
+; CHECK-SPIRV-DAG: %[[#Void:]] = OpTypeVoid
+; CHECK-SPIRV-DAG: %[[#Int:]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG: %[[#Zero64:]] = OpConstantNull %[[#Long]]
+; CHECK-SPIRV-DAG: %[[#Scope:]] = OpConstant %[[#Int]] 2
+; CHECK-SPIRV-DAG: %[[#MemSem:]] = OpConstant %[[#Int]] 0
+
+; Verify that both the phi node and atomic operation use the same i64 type
+; CHECK-SPIRV: %[[#ValuePhi:]] = OpPhi %[[#Long]] %[[#Zero64]] %[[#]] %[[#AtomicResult:]] %[[#]]
+; CHECK-SPIRV: %[[#AtomicResult]] = OpAtomicCompareExchange %[[#Long]] %[[#]] %[[#Scope]] %[[#MemSem]] %[[#MemSem]] %[[#Zero64]] %[[#ValuePhi]]
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
+target triple = "spirv64-unknown-unknown"
+
+declare i64 @_Z14atomic_cmpxchgPU8CLglobalVlll(ptr addrspace(1), i64, i64)
+
+define spir_kernel void @test_atomic_cmpxchg_phi(ptr addrspace(1) %ptr) {
+conversion:
+  br label %L6
+
+L6:                                               ; preds = %L6, %conversion
+  %value_phi = phi i64 [ 0, %conversion ], [ %1, %L6 ]
+  %1 = call i64 @_Z14atomic_cmpxchgPU8CLglobalVlll(ptr addrspace(1) %ptr, i64 %value_phi, i64 0)
+  br label %L6
+}

@Naghasan Naghasan requested a review from MrSidims August 19, 2025 10:02
fixes llvm#152863

Tests were written with some help from Copilot
I was testing based off of LLVM 20, looks like depending on the version
`OpConstant %8 0` might be optimized to `OpConstantNull %8`
simeonschaub and others added 2 commits August 19, 2025 15:42
Co-authored-by: Victor Lomuller <[email protected]>
remove checks that fail on CI and are not directly related to the issue
@Naghasan Naghasan merged commit 4c29521 into llvm:main Aug 20, 2025
10 checks passed
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vchuravy pushed a commit to JuliaPackaging/Yggdrasil that referenced this pull request Aug 20, 2025
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[SPIR-V] wrong return type for atomic_cmpxchg instruction

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