[AMDGPU] Fix SIFoldOperandsImpl::tryFoldZeroHighBits when met non-reg src1 operand.#133761

vpykhtin merged 3 commits into

llvm:mainllvm/llvm-project:mainfrom

vpykhtin:fix_tryFoldZeroHighBits_skip_nonregvpykhtin/llvm-project:fix_tryFoldZeroHighBits_skip_nonregCopy head branch name to clipboard