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25 changes: 13 additions & 12 deletions llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -696,7 +696,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
int64_t LROffset = getReturnSaveOffset();

int64_t FPOffset = 0;
if (HasFP) {
if (HasFP || (HasBP && Subtarget.isAIXABI())) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
Expand Down Expand Up @@ -821,7 +821,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
BuildMoveFromCR();

if (HasRedZone) {
if (HasFP)
if (HasFP || (HasBP && Subtarget.isAIXABI()))
BuildMI(MBB, MBBI, dl, StoreInst)
.addReg(FPReg)
.addImm(FPOffset)
Expand Down Expand Up @@ -1007,7 +1007,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
// R0 cannot be used as a base register, but it can be used as an
// index in a store-indexed.
int LastOffset = 0;
if (HasFP) {
if (HasFP || (HasBP && Subtarget.isAIXABI())) {
// R0 += (FPOffset-LastOffset).
// Need addic, since addi treats R0 as 0.
BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDIC), ScratchReg)
Expand Down Expand Up @@ -1052,7 +1052,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,

// Now that the stack frame has been allocated, save all the necessary
// registers using ScratchReg as the base address.
if (HasFP)
if (HasFP || (HasBP && Subtarget.isAIXABI()))
BuildMI(MBB, MBBI, dl, StoreInst)
.addReg(FPReg)
.addImm(FPOffset)
Expand All @@ -1077,7 +1077,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
// field of STWU). To be here we have to be compiling for PPC32.
// Since the SPReg has been decreased by FrameSize, add it back to each
// offset.
if (HasFP)
if (HasFP || (HasBP && Subtarget.isAIXABI()))
BuildMI(MBB, MBBI, dl, StoreInst)
.addReg(FPReg)
.addImm(FrameSize + FPOffset)
Expand Down Expand Up @@ -1123,7 +1123,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);

if (HasFP) {
if (HasFP || (HasBP && Subtarget.isAIXABI())) {
// Describe where FP was saved, at a fixed offset from CFA.
unsigned Reg = MRI->getDwarfRegNum(FPReg, true);
CFIIndex = MF.addFrameInst(
Expand Down Expand Up @@ -1606,7 +1606,7 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,

SingleScratchReg = ScratchReg == TempReg;

if (HasFP) {
if (HasFP || (HasBP && Subtarget.isAIXABI())) {
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
FPOffset = MFI.getObjectOffset(FPIndex);
Expand Down Expand Up @@ -1802,7 +1802,7 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
.addReg(RBReg);
}

if (HasFP) {
if (HasFP || (HasBP && Subtarget.isAIXABI())) {
// If there is red zone, restore FP directly, since SP has already been
// restored. Otherwise, restore the value of FP into ScratchReg.
if (HasRedZone || RBReg == SPReg)
Expand Down Expand Up @@ -1994,7 +1994,8 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
MachineFrameInfo &MFI = MF.getFrameInfo();

// If the frame pointer save index hasn't been defined yet.
if (!FPSI && needsFP(MF)) {
if (!FPSI &&
(needsFP(MF) || (RegInfo->hasBasePointer(MF) && Subtarget.isAIXABI()))) {
// Find out what the fix offset of the frame pointer save area.
int FPOffset = getFramePointerSaveOffset();
// Allocate the frame index for frame pointer save area.
Expand Down Expand Up @@ -2023,7 +2024,7 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
// some inline asm which explicitly clobbers it, when we otherwise have a
// frame pointer and are using r31's spill slot for the prologue/epilogue
// code. Same goes for the base pointer and the PIC base register.
if (needsFP(MF))
if (needsFP(MF) || (RegInfo->hasBasePointer(MF) && Subtarget.isAIXABI()))
SavedRegs.reset(isPPC64 ? PPC::X31 : PPC::R31);
if (RegInfo->hasBasePointer(MF))
SavedRegs.reset(RegInfo->getBaseRegister(MF));
Expand Down Expand Up @@ -2166,9 +2167,10 @@ void PPCFrameLowering::processFunctionBeforeFrameFinalized(MachineFunction &MF,
LowerBound -= (31 - TRI->getEncodingValue(MinFPR) + 1) * 8;
}

const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
// Check whether the frame pointer register is allocated. If so, make sure it
// is spilled to the correct offset.
if (needsFP(MF)) {
if (needsFP(MF) || (RegInfo->hasBasePointer(MF) && Subtarget.isAIXABI())) {
int FI = PFI->getFramePointerSaveIndex();
assert(FI && "No Frame Pointer Save Slot!");
MFI.setObjectOffset(FI, LowerBound + MFI.getObjectOffset(FI));
Expand All @@ -2185,7 +2187,6 @@ void PPCFrameLowering::processFunctionBeforeFrameFinalized(MachineFunction &MF,
HasGPSaveArea = true;
}

const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
if (RegInfo->hasBasePointer(MF)) {
int FI = PFI->getBasePointerSaveIndex();
assert(FI && "No Base Pointer Save Slot!");
Expand Down
7 changes: 6 additions & 1 deletion llvm/test/CodeGen/PowerPC/aix-base-pointer.ll
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,9 @@

; Use an overaligned buffer to force base-pointer usage. Test verifies:
; - base pointer register (r30) is saved/defined/restored.
; - frame pointer register (r31) is saved/defined/restored.
; - stack frame is allocated with correct alignment.
; - Address of %AlignedBuffer is calculated based off offset from the stack
; - Address of %AlignedBuffer is calculated based off offset from the frame
; pointer.

define float @caller(float %f) {
Expand All @@ -19,6 +20,7 @@ define float @caller(float %f) {
declare void @callee(ptr)

; 32BIT-LABEL: .caller:
; 32BIT: stw 31, -12(1)
; 32BIT: stw 30, -16(1)
; 32BIT: mr 30, 1
; 32BIT: clrlwi 0, 1, 27
Expand All @@ -27,9 +29,11 @@ declare void @callee(ptr)
; 32BIT: addi 3, 1, 64
; 32BIT: bl .callee
; 32BIT: mr 1, 30
; 32BIT: lwz 31, -12(1)
; 32BIT: lwz 30, -16(1)

; 64BIT-LABEL: .caller:
; 64BIT: std 31, -16(1)
; 64BIT: std 30, -24(1)
; 64BIT: mr 30, 1
; 64BIT: clrldi 0, 1, 59
Expand All @@ -38,4 +42,5 @@ declare void @callee(ptr)
; 64BIT: addi 3, 1, 128
; 64BIT: bl .callee
; 64BIT: mr 1, 30
; 64BIT: ld 31, -16(1)
; 64BIT: ld 30, -24(1)
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