Skip to content

[CIR][CIRGen][Builtin][X86] Lower AVX mask-to-vector conversion intrinsics #1738

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Jul 14, 2025
Merged

[CIR][CIRGen][Builtin][X86] Lower AVX mask-to-vector conversion intrinsics #1738

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
22 changes: 22 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -108,6 +108,14 @@ static mlir::Value emitX86MaskedStore(CIRGenFunction &cgf,
maskVec);
}

static mlir::Value emitX86SExtMask(CIRGenFunction &cgf, mlir::Value op,
mlir::Type dstTy, mlir::Location loc) {
unsigned numberOfElements = cast<cir::VectorType>(dstTy).getSize();
mlir::Value mask = getMaskVecValue(cgf, op, numberOfElements, loc);

return cgf.getBuilder().createCast(loc, cir::CastKind::integral, mask, dstTy);
}

mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (BuiltinID == Builtin::BI__builtin_cpu_is)
Expand Down Expand Up @@ -428,5 +436,19 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_storesd128_mask:
return emitX86MaskedStore(*this, Ops, llvm::Align(1),
getLoc(E->getExprLoc()));
case X86::BI__builtin_ia32_cvtmask2b128:
case X86::BI__builtin_ia32_cvtmask2b256:
case X86::BI__builtin_ia32_cvtmask2b512:
case X86::BI__builtin_ia32_cvtmask2w128:
case X86::BI__builtin_ia32_cvtmask2w256:
case X86::BI__builtin_ia32_cvtmask2w512:
case X86::BI__builtin_ia32_cvtmask2d128:
case X86::BI__builtin_ia32_cvtmask2d256:
case X86::BI__builtin_ia32_cvtmask2d512:
case X86::BI__builtin_ia32_cvtmask2q128:
case X86::BI__builtin_ia32_cvtmask2q256:
case X86::BI__builtin_ia32_cvtmask2q512:
return emitX86SExtMask(*this, Ops[0], convertType(E->getType()),
getLoc(E->getExprLoc()));
}
}
10 changes: 10 additions & 0 deletions clang/test/CIR/CodeGen/X86/avx512bw-builtins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,3 +27,13 @@ void test_mm512_mask_storeu_epi8(void *__P, __mmask64 __U, __m512i __A) {
// LLVM: @llvm.masked.store.v64i8.p0(<64 x i8> %{{.*}}, ptr %{{.*}}, i32 1, <64 x i1> %{{.*}})
return _mm512_mask_storeu_epi8(__P, __U, __A);
}

__m512i test_mm512_movm_epi16(__mmask32 __A) {
// CIR-LABEL: _mm512_movm_epi16
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u32i), !cir.vector<!cir.int<s, 1> x 32>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 32>), !cir.vector<!s16i x 32>
// LLVM-LABEL: @test_mm512_movm_epi16
// LLVM: %{{.*}} = bitcast i32 %{{.*}} to <32 x i1>
// LLVM: %{{.*}} = sext <32 x i1> %{{.*}} to <32 x i16>
return _mm512_movm_epi16(__A);
}
16 changes: 16 additions & 0 deletions clang/test/CIR/CodeGen/X86/avx512dq-builtins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512dq -fclangir -emit-cir -o %t.cir -Wall -Werror
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512dq -fclangir -emit-llvm -o %t.ll -Wall -Werror
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s

#include <immintrin.h>

__m512i test_mm512_movm_epi64(__mmask8 __A) {
// CIR-LABEL: _mm512_movm_epi64
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>), !cir.vector<!s64i x 8>
// LLVM-LABEL: @test_mm512_movm_epi64
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = sext <8 x i1> %{{.*}} to <8 x i64>
return _mm512_movm_epi64(__A);
}
55 changes: 55 additions & 0 deletions clang/test/CIR/CodeGen/X86/avx512vlbw-buiiltins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -51,3 +51,58 @@ void test_mm256_mask_storeu_pd(void *__P, __mmask8 __U, __m256d __A) {
// LLVM: @llvm.masked.store.v4f64.p0(<4 x double> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}})
return _mm256_mask_storeu_pd(__P, __U, __A);
}

__m128i test_mm_movm_epi8(__mmask16 __A) {
// CIR-LABEL: _mm_movm_epi8
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u16i), !cir.vector<!cir.int<s, 1> x 16>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 16>), !cir.vector<{{!s8i|!u8i}} x 16>

// LLVM-LABEL: @test_mm_movm_epi8
// LLVM: %{{.*}} = bitcast i16 %{{.*}} to <16 x i1>
// LLVM: %{{.*}} = sext <16 x i1> %{{.*}} to <16 x i8>
return _mm_movm_epi8(__A);
}

__m256i test_mm256_movm_epi8(__mmask32 __A) {
// CIR-LABEL: _mm256_movm_epi8
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u32i), !cir.vector<!cir.int<s, 1> x 32>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 32>), !cir.vector<{{!s8i|!u8i}} x 32>

// LLVM-LABEL: @test_mm256_movm_epi8
// LLVM: %{{.*}} = bitcast i32 %{{.*}} to <32 x i1>
// LLVM: %{{.*}} = sext <32 x i1> %{{.*}} to <32 x i8>
return _mm256_movm_epi8(__A);
}

__m512i test_mm512_movm_epi8(__mmask64 __A) {
// CIR-LABEL: _mm512_movm_epi8
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u64i), !cir.vector<!cir.int<s, 1> x 64>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 64>), !cir.vector<{{!s8i|!u8i}} x 64>

// LLVM-LABEL: @test_mm512_movm_epi8
// LLVM: %{{.*}} = bitcast i64 %{{.*}} to <64 x i1>
// LLVM: %{{.*}} = sext <64 x i1> %{{.*}} to <64 x i8>
return _mm512_movm_epi8(__A);
}

__m128i test_mm_movm_epi16(__mmask8 __A) {
// CIR-LABEL: _mm_movm_epi16
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>), !cir.vector<!s16i x 8>

// LLVM-LABEL: @test_mm_movm_epi16
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = sext <8 x i1> %{{.*}} to <8 x i16>
return _mm_movm_epi16(__A);
}

__m256i test_mm256_movm_epi16(__mmask16 __A) {
// CIR-LABEL: _mm256_movm_epi16
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u16i), !cir.vector<!cir.int<s, 1> x 16>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 16>), !cir.vector<!s16i x 16>

// LLVM-LABEL: @test_mm256_movm_epi16
// LLVM: %{{.*}} = bitcast i16 %{{.*}} to <16 x i1>
// LLVM: %{{.*}} = sext <16 x i1> %{{.*}} to <16 x i16>
return _mm256_movm_epi16(__A);
}
67 changes: 67 additions & 0 deletions clang/test/CIR/CodeGen/X86/avx512vldq-builtins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,67 @@
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512dq -target-feature +avx512vl -fclangir -emit-cir -o %t.cir -Wall -Werror
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512dq -target-feature +avx512vl -fclangir -emit-llvm -o %t.ll -Wall -Werror
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s

#include <immintrin.h>

__m128i test_mm_movm_epi32(__mmask8 __A) {
// CIR-LABEL: _mm_movm_epi32
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>) [#cir.int<0> : !s32i, #cir.int<1> : !s32i, #cir.int<2> : !s32i, #cir.int<3> : !s32i] : !cir.vector<!cir.int<s, 1> x 4>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 4>), !cir.vector<!s32i x 4>

// LLVM-LABEL: @test_mm_movm_epi32
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// LLVM: %{{.*}} = sext <4 x i1> %{{.*}} to <4 x i32>
return _mm_movm_epi32(__A);
}

__m256i test_mm256_movm_epi32(__mmask8 __A) {
// CIR-LABEL: _mm256_movm_epi32
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>), !cir.vector<!s32i x 8>

// LLVM-LABEL: @test_mm256_movm_epi32
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = sext <8 x i1> %{{.*}} to <8 x i32>
return _mm256_movm_epi32(__A);
}

__m512i test_mm512_movm_epi32(__mmask16 __A) {
// CIR-LABEL: _mm512_movm_epi32
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u16i), !cir.vector<!cir.int<s, 1> x 16>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 16>), !cir.vector<!s32i x 16>

// LLVM-LABEL: @test_mm512_movm_epi32
// LLVM: %{{.*}} = bitcast i16 %{{.*}} to <16 x i1>
// LLVM: %{{.*}} = sext <16 x i1> %{{.*}} to <16 x i32>
return _mm512_movm_epi32(__A);
}

__m128i test_mm_movm_epi64(__mmask8 __A) {
// CIR-LABEL: _mm_movm_epi64
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>) [#cir.int<0> : !s32i, #cir.int<1> : !s32i] : !cir.vector<!cir.int<s, 1> x 2>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 2>), !cir.vector<!s64i x 2>

// LLVM-LABEL: @test_mm_movm_epi64
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1>
// LLVM: %{{.*}} = sext <2 x i1> %{{.*}} to <2 x i64>
return _mm_movm_epi64(__A);
}

__m256i test_mm256_movm_epi64(__mmask8 __A) {
// CIR-LABEL: _mm256_movm_epi64
// CIR: %{{.*}} = cir.cast(bitcast, %{{.*}} : !u8i), !cir.vector<!cir.int<s, 1> x 8>
// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<!cir.int<s, 1> x 8>) [#cir.int<0> : !s32i, #cir.int<1> : !s32i, #cir.int<2> : !s32i, #cir.int<3> : !s32i] : !cir.vector<!cir.int<s, 1> x 4>
// CIR: %{{.*}} = cir.cast(integral, %{{.*}} : !cir.vector<!cir.int<s, 1> x 4>), !cir.vector<!s64i x 4>

// LLVM-LABEL: @test_mm256_movm_epi64
// LLVM: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>
// LLVM: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// LLVM: %{{.*}} = sext <4 x i1> %{{.*}} to <4 x i64>
return _mm256_movm_epi64(__A);
}
Loading