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[SYCL][ESIMD] Pass to replace simd* parameters with native llvm vectors. #2097

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Merged
pvchupin merged 5 commits into from
Jul 28, 2020
Merged

[SYCL][ESIMD] Pass to replace simd* parameters with native llvm vectors. #2097

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8cb59d7
[SYCL][ESIMD] Pass to replace simd* parameters with native llvm vectors.
kbobrovs Jul 13, 2020
fb752d6
removed unrelated test change
kbobrovs Jul 13, 2020
ac3a4af
Add test for ESIMDLowerVecArg pass. Refactor code as per code comments.
pratikashar Jul 14, 2020
0ba9ae8
[SQUASH] Address review comments.
kbobrovs Jul 28, 2020
a2002b3
[SQUASH] Fix esimd_global.ll test
kbobrovs Jul 28, 2020
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2 changes: 1 addition & 1 deletion clang/test/CodeGenSYCL/esimd-private-global.cpp
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Expand Up @@ -9,6 +9,6 @@ __attribute__((opencl_private)) __attribute__((register_num(17))) int vc;

SYCL_EXTERNAL void init_vc(int x) {
vc = x;
// CHECK: store i32 %0, i32* @vc
// CHECK: store i32 %x, i32* @vc
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@bader bader Jul 13, 2020

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AFAIK, registers are not named if assertions are disabled.
I suggest using FileCheck pattern matching variables to make it work in both modes.

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@pratikashar pratikashar Jul 13, 2020

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will do.

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@pratikashar pratikashar Jul 13, 2020

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@kbobrovs - this is a test for Gang's global variable GRF binding. i dont think this test validates the pass under review.

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@kbobrovs kbobrovs Jul 13, 2020

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Right, this is unrelated change - fixed.

}
// CHECK: attributes #0 = { "genx_byte_offset"="17" "genx_volatile" }
3 changes: 3 additions & 0 deletions llvm/include/llvm/SYCLLowerIR/LowerESIMD.h
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Expand Up @@ -42,6 +42,9 @@ class ESIMDLowerLoadStorePass : public PassInfoMixin<ESIMDLowerLoadStorePass> {
FunctionPass *createESIMDLowerLoadStorePass();
void initializeESIMDLowerLoadStorePass(PassRegistry &);

ModulePass *createESIMDLowerVecArgPass();
void initializeESIMDLowerVecArgLegacyPassPass(PassRegistry &);

} // namespace llvm

#endif // LLVM_SYCLLOWERIR_LOWERESIMD_H
1 change: 1 addition & 0 deletions llvm/lib/SYCLLowerIR/CMakeLists.txt
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Expand Up @@ -32,6 +32,7 @@ add_llvm_component_library(LLVMSYCLLowerIR
LowerWGScope.cpp
LowerESIMD.cpp
LowerESIMDVLoadVStore.cpp
LowerESIMDVecArg.cpp

ADDITIONAL_HEADER_DIRS
${LLVM_MAIN_INCLUDE_DIR}/llvm/SYCLLowerIR
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