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[RISC-V][JIT] JIT/CodeGenBringUpTest #84748

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Merged
jakobbotsch merged 30 commits into from
Apr 27, 2023
Merged

[RISC-V][JIT] JIT/CodeGenBringUpTest #84748

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9539195
[JIT] Update RISCV64
clamp03 Mar 13, 2023
f77a71f
[JIT] Update RISCV64
clamp03 Mar 14, 2023
34ba039
[JIT] FIX TEST ERRORS
clamp03 Mar 14, 2023
8093fdd
[JIT] FIX TEST ERROR
clamp03 Mar 16, 2023
2a47ddd
[JIT] FIX TEST ERRORS
clamp03 Mar 17, 2023
3b698f5
[JIT] FIX TEST ERROR
clamp03 Mar 17, 2023
759a461
[JIT] Fix rotate test errors
clamp03 Mar 20, 2023
b36c0cd
[JIT] Fix erorrs in JTrueNeFP
clamp03 Mar 20, 2023
3fbdff4
[JIT] Fix an error
clamp03 Mar 20, 2023
c401dff
[JIT] Optimize making constant a little
clamp03 Mar 20, 2023
49b4952
[JIT] Update emitIns_I_la more
clamp03 Mar 21, 2023
cf897f6
Add todo comment about code quality
gbalykov Mar 24, 2023
549ee14
[JIT] Fix bugs in float and double
clamp03 Mar 30, 2023
f2336ca
[JIT] Remove unnecessary comment
clamp03 Apr 3, 2023
b9ff4f0
[JIT] FIX
clamp03 Apr 3, 2023
36b4b35
[JIT] Fix error
clamp03 Apr 5, 2023
478110e
[JIT] Update Float Neg
clamp03 Apr 6, 2023
268cf41
[JIT] Update rounding mode and register use
clamp03 Apr 10, 2023
89b0adb
[JIT] Update
clamp03 Apr 11, 2023
f91f640
[JIT] Support Float JumpCompare
clamp03 Apr 7, 2023
c2c89a3
[JIT] Remove GT_OBJ and LCL_VAR_ADDR
clamp03 Apr 11, 2023
4eec2be
[JIT] JIT-FORMAT
clamp03 Apr 11, 2023
bed8b9c
[JIT] Fix JCMP cond error
clamp03 Apr 13, 2023
6c57087
Merge remote-tracking branch 'upstream/main' into codegenbringuptest
clamp03 Apr 17, 2023
8ec1c58
Merge remote-tracking branch 'upstream/main' into codegenbringuptest
clamp03 Apr 24, 2023
af68827
Revert "[JIT] Fix JCMP cond error"
clamp03 Apr 25, 2023
5520585
Merge remote-tracking branch 'upstream/main' into codegenbringuptest
clamp03 Apr 25, 2023
1946f91
[JIT] Remove rounding mode comments
clamp03 Apr 25, 2023
5a52b0e
[JIT] Fix Float-to-Float copy
clamp03 Apr 26, 2023
278a490
Update Alignment and Definitions
clamp03 Apr 27, 2023
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18 changes: 9 additions & 9 deletions src/coreclr/debug/inc/dbgtargetcontext.h
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Original file line number Diff line number Diff line change
Expand Up @@ -555,26 +555,25 @@ static_assert(sizeof(DT_CONTEXT) == sizeof(T_CONTEXT), "DT_CONTEXT size must equ
#define DT_RISCV64_MAX_BREAKPOINTS 8
#define DT_RISCV64_MAX_WATCHPOINTS 2

typedef DECLSPEC_ALIGN(16) struct {
typedef struct DECLSPEC_ALIGN(16) {
//
// Control flags.
//

/* +0x000 */ DWORD ContextFlags;
/* +0x004 */ DWORD Fcsr;

//
// Integer registers
//
DWORD64 ZR;
DWORD64 RA;
DWORD64 SP;
DWORD64 GP;
DWORD64 TP;
DWORD64 R0;
DWORD64 Ra;
DWORD64 Sp;
DWORD64 Gp;
DWORD64 Tp;
DWORD64 T0;
DWORD64 T1;
DWORD64 T2;
DWORD64 FP;
DWORD64 Fp;
DWORD64 S1;
DWORD64 A0;
DWORD64 A1;
Expand All @@ -598,12 +597,13 @@ typedef DECLSPEC_ALIGN(16) struct {
DWORD64 T4;
DWORD64 T5;
DWORD64 T6;
DWORD64 PC;
DWORD64 Pc;

//
// Floating Point Registers
//
ULONGLONG F[32];
DWORD Fcsr;
} DT_CONTEXT;

static_assert(sizeof(DT_CONTEXT) == sizeof(T_CONTEXT), "DT_CONTEXT size must equal the T_CONTEXT size");
Expand Down
18 changes: 9 additions & 9 deletions src/coreclr/debug/inc/riscv64/primitives.h
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Original file line number Diff line number Diff line change
Expand Up @@ -87,31 +87,31 @@ constexpr CorDebugRegister g_JITToCorDbgReg[] =
inline void CORDbgSetIP(DT_CONTEXT *context, LPVOID ip) {
LIMITED_METHOD_CONTRACT;

context->PC = (DWORD64)ip;
context->Pc = (DWORD64)ip;
}

inline LPVOID CORDbgGetSP(const DT_CONTEXT * context) {
LIMITED_METHOD_CONTRACT;

return (LPVOID)(size_t)(context->SP);
return (LPVOID)(size_t)(context->Sp);
}

inline void CORDbgSetSP(DT_CONTEXT *context, LPVOID esp) {
LIMITED_METHOD_CONTRACT;

context->SP = (DWORD64)esp;
context->Sp = (DWORD64)esp;
}

inline LPVOID CORDbgGetFP(const DT_CONTEXT * context) {
LIMITED_METHOD_CONTRACT;

return (LPVOID)(size_t)(context->FP);
return (LPVOID)(size_t)(context->Fp);
}

inline void CORDbgSetFP(DT_CONTEXT *context, LPVOID fp) {
LIMITED_METHOD_CONTRACT;

context->FP = (DWORD64)fp;
context->Fp = (DWORD64)fp;
}


Expand All @@ -121,9 +121,9 @@ inline BOOL CompareControlRegisters(const DT_CONTEXT * pCtx1, const DT_CONTEXT *

// TODO-RISCV64: Sort out frame registers

if ((pCtx1->PC == pCtx2->PC) &&
(pCtx1->SP == pCtx2->SP) &&
(pCtx1->FP == pCtx2->FP))
if ((pCtx1->Pc == pCtx2->Pc) &&
(pCtx1->Sp == pCtx2->Sp) &&
(pCtx1->Fp == pCtx2->Fp))
{
return TRUE;
}
Expand Down Expand Up @@ -168,7 +168,7 @@ inline LPVOID CORDbgGetIP(DT_CONTEXT *context)
{
LIMITED_METHOD_CONTRACT;

return (LPVOID)(size_t)(context->PC);
return (LPVOID)(size_t)(context->Pc);
}

inline void CORDbgSetInstructionExImpl(CORDB_ADDRESS_TYPE* address,
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/inc/crosscomp.h
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Original file line number Diff line number Diff line change
Expand Up @@ -540,7 +540,6 @@ typedef struct DECLSPEC_ALIGN(16) _T_CONTEXT {
//

/* +0x000 */ DWORD ContextFlags;
/* +0x004 */ DWORD Fcsr;

//
// Integer registers
Expand Down Expand Up @@ -584,6 +583,7 @@ typedef struct DECLSPEC_ALIGN(16) _T_CONTEXT {
//
//TODO-RISCV64: support the SIMD.
ULONGLONG F[32];
DWORD Fcsr;
} T_CONTEXT, *PT_CONTEXT;

// _IMAGE_RISCV64_RUNTIME_FUNCTION_ENTRY (see ExternalAPIs\Win9CoreSystem\inc\winnt.h)
Expand Down
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