[mono][jit] Adding compare all/any intrinsics. #83515
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -1190,18 +1190,18 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi | |
| return NULL; | ||
| #endif | ||
| // FIXME: This limitation could be removed once everything here are supported by mini JIT on arm64 | ||
| //#ifdef TARGET_ARM64 | ||
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| // if (!(cfg->compile_aot && cfg->full_aot && !cfg->interp)) | ||
| // return NULL; | ||
| //#endif | ||
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| int id = lookup_intrins (sri_vector_methods, sizeof (sri_vector_methods), cmethod); | ||
| if (id == -1) { | ||
| //check_no_intrinsic_cattr (cmethod); | ||
| return NULL; | ||
| } | ||
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| if (!strcmp (m_class_get_name (cfg->method->klass), "Vector256") || !strcmp (m_class_get_name (cfg->method->klass), "Vector512")) | ||
| return NULL; // TODO: Fix Vector256.WithUpper/WithLower | ||
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| // FIXME: This limitation could be removed once everything here are supported by mini JIT on arm64 | ||
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@@ -1216,6 +1216,16 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi | |
| case SN_LessThanOrEqual: | ||
| case SN_Negate: | ||
| case SN_OnesComplement: | ||
| case SN_EqualsAny: | ||
| case SN_GreaterThanAny: | ||
| case SN_GreaterThanOrEqualAny: | ||
| case SN_LessThanAny: | ||
| case SN_LessThanOrEqualAny: | ||
| case SN_EqualsAll: | ||
| case SN_GreaterThanAll: | ||
| case SN_GreaterThanOrEqualAll: | ||
| case SN_LessThanAll: | ||
| case SN_LessThanOrEqualAll: | ||
| case SN_Subtract: | ||
| case SN_BitwiseAnd: | ||
| case SN_BitwiseOr: | ||
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@@ -1475,18 +1485,26 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi | |
| if (!is_element_type_primitive (fsig->params [0])) | ||
| return NULL; | ||
| MonoClass *arg_class = mono_class_from_mono_type_internal (fsig->params [0]); | ||
| if (id == SN_Equals) | ||
| return emit_xcompare (cfg, klass, arg0_type, args [0], args [1]); | ||
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| if (COMPILE_LLVM (cfg)) { | ||
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| switch (id) { | ||
| case SN_EqualsAll: | ||
| return emit_xequal (cfg, arg_class, args [0], args [1]); | ||
| case SN_EqualsAny: { | ||
| MonoInst *cmp_eq = emit_xcompare (cfg, arg_class, arg0_type, args [0], args [1]); | ||
| MonoInst *zero = emit_xzero (cfg, arg_class); | ||
| return emit_not_xequal (cfg, arg_class, cmp_eq, zero); | ||
| } | ||
| } | ||
| } else { | ||
| MonoInst* cmp = emit_xcompare (cfg, arg_class, arg0_type, args [0], args [1]); | ||
| MonoInst* ret = emit_simd_ins (cfg, mono_defaults.boolean_class, OP_XEXTRACT, cmp->dreg, -1); | ||
| ret->inst_c0 = (id == SN_EqualsAll) ? SIMD_EXTR_MIN8 : SIMD_EXTR_MAX8; | ||
| return ret; | ||
| } | ||
| g_assert_not_reached (); | ||
| } | ||
| case SN_ExtractMostSignificantBits: { | ||
| if (!is_element_type_primitive (fsig->params [0]) || type_enum_is_float (arg0_type)) | ||
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@@ -1554,34 +1572,39 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi | |
| fsig->ret->type == MONO_TYPE_BOOLEAN && | ||
| mono_metadata_type_equal (fsig->params [0], fsig->params [1])); | ||
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| gboolean is_all = FALSE; | ||
| switch (id) { | ||
| case SN_GreaterThanAll: | ||
| case SN_GreaterThanOrEqualAll: | ||
| case SN_LessThanAll: | ||
| case SN_LessThanOrEqualAll: | ||
| is_all = TRUE; | ||
| break; | ||
| } | ||
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| MonoClass *arg_class = mono_class_from_mono_type_internal (fsig->params [0]); | ||
| if (COMPILE_LLVM (cfg)) { | ||
| MonoInst *cmp = emit_xcompare_for_intrinsic (cfg, klass, id, arg0_type, args [0], args [1]); | ||
| if (is_all) { | ||
| // for floating point numbers all ones is NaN and so | ||
| // they must be treated differently than integer types | ||
| if (type_enum_is_float (arg0_type)) { | ||
| MonoInst *zero = emit_xzero (cfg, arg_class); | ||
| MonoInst *inverted_cmp = emit_xcompare (cfg, klass, arg0_type, cmp, zero); | ||
| return emit_xequal (cfg, arg_class, inverted_cmp, zero); | ||
| } | ||
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| MonoInst *ones = emit_xones (cfg, arg_class); | ||
| return emit_xequal (cfg, arg_class, cmp, ones); | ||
| } else { | ||
| MonoInst *zero = emit_xzero (cfg, arg_class); | ||
| return emit_not_xequal (cfg, arg_class, cmp, zero); | ||
| } | ||
| } else { | ||
| MonoInst *cmp = emit_xcompare_for_intrinsic (cfg, arg_class, id, arg0_type, args [0], args [1]); | ||
| MonoInst* ret = emit_simd_ins (cfg, mono_defaults.boolean_class, OP_XEXTRACT, cmp->dreg, -1); | ||
| ret->inst_c0 = is_all ? SIMD_EXTR_MIN8 : SIMD_EXTR_MAX8; | ||
| return ret; | ||
| } | ||
| } | ||
| case SN_Narrow: { | ||
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Is it possible to not hardcode the length of the vector to
VREG_FULL. I am thinking of reusing for vector64 in the future.There was a problem hiding this comment.
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Yes, there is a 64-bit variant of this.
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OP_XEXTRACTnow carries vector width (8 or 16) inins->inst_c1.