[Arm64] AdvSIMD LoadPairVector64 and LoadPairVector128#45020

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echesakov wants to merge 18 commits intodotnet:masterfrom

echesakov:Arm64-ASIMD-LoadPairVector64-LoadPairVector128

Commits on Nov 19, 2020

Support mulx returning ValueTuple

CarolEidt
authored and
echesakov
committed
Remove accidentially added build.out build-tests.out libs.out
echesakov
committed

Commits on Nov 20, 2020

Add LoadPairVector64 and LoadPairVector128 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
echesakov
committed
Add LoadPairScalarVector64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
echesakov
committed
Add LoadPairVector64NonTemporal and LoadPairVector128NonTemporal in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
echesakov
committed
Add LoadPairScalarVector64NonTemporal in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
echesakov
committed
Update System.Runtime.Intrinsics.cs
echesakov
committed
Add LoadPairVector64 and LoadPairVector128 in hwintrinsiclistarm64.h
echesakov
committed
Support LoadPairVector128/64 in Compiler::impHWIntrinsic in src/coreclr/src/jit/hwintrinsic.cpp
echesakov
committed
Exclude changes affecting current code generation of Bmi2.MultiplyNoFlags
echesakov
committed
Support multireg hardware intrinsics on Arm64 in src/coreclr/src/jit/gentree.cpp src/coreclr/src/jit/gentree.h src/coreclr/src/jit/lsra.cpp
echesakov
committed
Support LoadPairVector128/64 in Compiler::impSpecialIntrinsic in src/coreclr/src/jit/hwintrinsicarm64.cpp
echesakov
committed
Support LoadPairVector128/64 in CodeGen::genHWIntrinsic in src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
echesakov
committed
Extend LinearScan::BuildHWIntrinsic to support intrinsics returning values in multiple registers in src/coreclr/src/jit/lsra.h src/coreclr/src/jit/lsraarm64.cpp src/coreclr/src/jit/lsraxarch.cpp
echesakov
committed
Add LoadPairVectorTest.template
echesakov
committed
Add LoadPairVector64 and LoadPairVector128 in GenerateTests.csx
echesakov
committed
Add .Take() in src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt
echesakov
committed
Update src/tests/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/*
echesakov
committed

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[Arm64] AdvSIMD LoadPairVector64 and LoadPairVector128#45020

[Arm64] AdvSIMD LoadPairVector64 and LoadPairVector128#45020
echesakov wants to merge 18 commits intodotnet:masterfrom
echesakov:Arm64-ASIMD-LoadPairVector64-LoadPairVector128

Commits on Nov 19, 2020

Support mulx returning ValueTuple

Remove accidentially added build.out build-tests.out libs.out

Commits on Nov 20, 2020

Add LoadPairVector64 and LoadPairVector128 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

Add LoadPairScalarVector64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

Add LoadPairVector64NonTemporal and LoadPairVector128NonTemporal in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

Add LoadPairScalarVector64NonTemporal in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

Update System.Runtime.Intrinsics.cs

Add LoadPairVector64 and LoadPairVector128 in hwintrinsiclistarm64.h

Support LoadPairVector128/64 in Compiler::impHWIntrinsic in src/coreclr/src/jit/hwintrinsic.cpp

Exclude changes affecting current code generation of Bmi2.MultiplyNoFlags

Support multireg hardware intrinsics on Arm64 in src/coreclr/src/jit/gentree.cpp src/coreclr/src/jit/gentree.h src/coreclr/src/jit/lsra.cpp

Support LoadPairVector128/64 in Compiler::impSpecialIntrinsic in src/coreclr/src/jit/hwintrinsicarm64.cpp

Support LoadPairVector128/64 in CodeGen::genHWIntrinsic in src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp

Extend LinearScan::BuildHWIntrinsic to support intrinsics returning values in multiple registers in src/coreclr/src/jit/lsra.h src/coreclr/src/jit/lsraarm64.cpp src/coreclr/src/jit/lsraxarch.cpp

Add LoadPairVectorTest.template

Add LoadPairVector64 and LoadPairVector128 in GenerateTests.csx

Add .Take() in src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt

Update src/tests/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/*