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Fixes #105621. When its immediate is out-of-bounds, AdvSimd.ShiftRightLogical can be transformed into AdvSimd.ShiftLogical, which takes the immediate in a register. This means AdvSimd.ShiftRightLogical will no longer throw ArgumentOutOfRangeException in Debug or Release; when optimizing, we'd previously fold the intrinsic away, thus creating behavioral discrepancies.

@ghost ghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jul 31, 2024
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cc @dotnet/jit-contrib, @tannergooding PTAL.

Comment on lines 573 to 584
impSpillSideEffect(true,
verCurrentState.esStackDepth - 2 DEBUGARG("Spilling op1 side effects for HWIntrinsic"));

GenTree* op2 = impPopStack().val;
GenTree* op1 = impSIMDPopStack();

// AdvSimd.ShiftLogical does right-shifts with negative immediates, hence the negation
GenTree* tmpOp =
gtNewSimdCreateBroadcastNode(simdType, gtNewOperNode(GT_NEG, genActualType(op2->TypeGet()), op2),
simdBaseJitType, genTypeSize(simdType));
return gtNewSimdHWIntrinsicNode(simdType, op1, tmpOp, NI_AdvSimd_ShiftLogical, simdBaseJitType,
genTypeSize(simdType));
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Is the spilling necessary?

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I assumed we would need it since we do the same for AVX2/SSE intrinsics, but looks like we don't need it. Fixed.

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yep, we don't. Here op1 is still evaluated before op2 so all good

@@ -0,0 +1,32 @@
// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.

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We usually copy-paste Fuzzlyn's header for repros

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JIT: AdvSimd.ShiftRightLogical(x, 0) throws in debug but not in release

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