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UPSTREAM PR #17716: ggml-cpu: add RISC-V Vector support for RWKV WKV6 operation#412

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UPSTREAM PR #17716: ggml-cpu: add RISC-V Vector support for RWKV WKV6 operation#412
loci-dev wants to merge 2 commits intomainfrom
upstream-PR17716-branch_ixgbe-add_rvv_for_rwkv_wkv6

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@loci-dev loci-dev commented Dec 3, 2025

Mirrored from ggml-org/llama.cpp#17716

This PR adds RISC-V Vector (RVV) extension support for the RWKV WKV6 operation, enabling vectorized computation on RISC-V platforms.

Signed-off-by: Wang Yang <yangwang@iscas.ac.cn>
@loci-dev loci-dev force-pushed the main branch 9 times, most recently from dba8180 to 8654e36 Compare December 3, 2025 21:08
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loci-review bot commented Dec 4, 2025

Explore the complete analysis inside the Version Insights

Performance Analysis Summary

Analysis Scope: PR #412 - RISC-V Vector support for RWKV WKV6 operation

Condition Assessment: Condition 1 applies - No meaningful performance impact detected.

Summary

This PR adds RISC-V Vector extension support for RWKV WKV6 operations without affecting inference performance. The only measured change is a 42 ns increase in ggml_compute_forward_solve_tri_f32 (unrelated to PR modifications), which is negligible. No tokenization or inference functions (llama_decode, llama_encode, llama_tokenize) were modified. Power consumption remains stable across all binaries with maximum change of 0.007% in libggml-cpu.so. Tokens per second unaffected.

@loci-dev loci-dev force-pushed the main branch 15 times, most recently from 4587bfa to 3e4b499 Compare December 5, 2025 12:15
@loci-dev loci-dev force-pushed the main branch 30 times, most recently from 92b887d to b29e20d Compare December 10, 2025 15:11
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