synth_analogdevices: synthesis for Analog Devices EFLX FPGAs [sc-273]#5698
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Ravenslofty wants to merge 29 commits intomainfrom
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synth_analogdevices: synthesis for Analog Devices EFLX FPGAs [sc-273]#5698Ravenslofty wants to merge 29 commits intomainfrom
Ravenslofty wants to merge 29 commits intomainfrom
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Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy). Drop the unused defines from the synth pass. Remove comments from the lutram files referencing xilinx.
Enable `-force-params`, and tidy up lutram mapping too.
Tested all the accepted configurations in eXpreso, disabling the RBRAM2 configs that fail to place, and increasing the cost for the double site TDP memories.
`mem_gen.py` based on quicklogic tests. Remove BUFG from `lutram.ys`. Extra `sync_ram_sp` models in `arch/common/blockram.v`. Add analogdevices to main makefile tests. Not all the other tests are passing, but that's fine for now.
Ravenslofty
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This adds a Yosys synthesis script targeting the Analog Devices EFLX fabric, with a test suite ported from
synth_xilinx.(I might squash these patches to make them easier to review, but for now here they are.)