Add bf16-emulation option to convert-vector-to-aievec pipeline#2942
Merged
erwei-xilinx merged 2 commits intoXilinx:mainfrom Mar 10, 2026
Merged
Add bf16-emulation option to convert-vector-to-aievec pipeline#2942erwei-xilinx merged 2 commits intoXilinx:mainfrom
erwei-xilinx merged 2 commits intoXilinx:mainfrom
Conversation
erwei-xilinx
requested review from
fifield,
hunhoffe,
jackl-xilinx,
jgmelber,
jsetoain and
stephenneuendorffer
as code owners
Add a `bf16-emulation` option that emulates f32 vector arithmetic using bf16 operations. When enabled, the pass inserts arith.truncf/ arith.extf around f32 vector ops to compute in bf16, trading precision for performance (1 bf16 op vs 3-9 MACs for f32 emulation on AIE2). The pass runs as the first step in the canonicalize-vector-for-aievec pipeline. It handles binary ops (addf, subf, mulf, maximumf, minimumf), comparison (cmpf), select, vector.fma, negf, and vector.reduction. arith.divf is excluded because bf16 vector divf is not supported by Peano on any AIE target. A smart truncation helper eliminates redundant extf->truncf chains between consecutive demoted ops, keeping the IR clean. Co-Authored-By: Claude Opus 4.6 <[email protected]>
Contributor
There was a problem hiding this comment.
Pull request overview
Adds an opt-in bf16-emulation mode to the AIEVec vector canonicalization stage so f32 vector arithmetic can be computed via bf16 ops (via arith.truncf/arith.extf insertion) before existing AIEVec lowering patterns run.
Changes:
- Introduce a new BF16 emulation pass that rewrites supported f32 vector ops to bf16 equivalents with ext/trunc boundaries (and avoids redundant extf→truncf chains).
- Plumb a new
bf16-emulationboolean pipeline option throughconvert-vector-to-aievecinto thecanonicalize-vector-for-aievecsub-pipeline. - Add a new MLIR test file covering several emulation rewrite patterns and the divf exclusion behavior.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
lib/Dialect/AIEVec/Transforms/VectorToVectorConversions.cpp |
Adds BF16 emulation rewrite patterns + pass and hooks it into the canonicalize pipeline when enabled. |
include/aie/Dialect/AIEVec/Pipelines/Passes.h |
Adds bf16-emulation option to pipeline options and forwards it from convert→canonicalize options. |
test/Conversion/VectorToAIEVec/test-bf16-emulation.mlir |
New FileCheck tests for bf16-emulation behavior (demotion, chaining, and divf non-demotion). |
💡 Add Copilot custom instructions for smarter, more guided reviews. Learn how to get started.
Co-Authored-By: Claude Opus 4.6 <[email protected]>
3 tasks
erwei-xilinx
added a commit
to erwei-xilinx/mlir-air-erwei
that referenced
this pull request
Mar 10, 2026
Update mlir-aie wheel to 0.0.1.2026031005+d4f709d which includes the bf16-emulation pass (PR Xilinx/mlir-aie#2942). This commit adds the convert-vector-to-aievec bf16-emulation option and the aiecc --bf16-emulation CLI flag needed by the f32 primitive tests. Also updates eudsl-python-extras hash to 09d24cd. Co-Authored-By: Claude Opus 4.6 <[email protected]>
erwei-xilinx
added a commit
to erwei-xilinx/mlir-aie
that referenced
this pull request
Mar 12, 2026
The --bf16-emulation flag was added to the Python aiecc in Xilinx#2942 but was lost when the Python aiecc was replaced by the C++ binary in Xilinx#2925. This adds it to the C++ binary and threads it through to the convert-vector-to-aievec pipeline string. Co-Authored-By: Claude Opus 4.6 <[email protected]>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
bf16-emulationboolean option to theconvert-vector-to-aievecpipeline that emulates f32 vector arithmetic using bf16 operationsarith.truncf/arith.extfaround f32 vector ops to compute in bf16, trading precision for performance (1 bf16 op vs 3-9 MACs for f32 emulation on AIE2)arith.divfbecause bf16 vector divf is unsupported on all AIE targets (Peano does not legalizeG_FDIVon<16 x s16>)Details
The pass runs as the first step in the
canonicalize-vector-for-aievecpipeline (Vector→Vector stage), before the existing lowering patterns. Supported ops:arith.addf,arith.subf,arith.mulf,arith.maximumf,arith.minimumfarith.cmpf(result staysvector<Nxi1>)arith.selectvector.fmaarith.negfvector.reductionA smart truncation helper (
smartTruncF32ToBF16) eliminates redundantextf→truncfchains between consecutive demoted ops. For example,addf f32 → mulf f32becomesaddf bf16 → mulf bf16with no intermediate type conversions.After demotion, the existing bf16 lowering patterns handle the ops naturally. FMA fusion still works:
mulf bf16 + addf bf16fuses toaievec.mac_elemwith f32 accumulator, providing some precision recovery.Usage
aie-opt --convert-vector-to-aievec="aie-target=aie2 target-backend=llvmir bf16-emulation=true" input.mlirTest plan
test/Conversion/VectorToAIEVec/test-bf16-emulation.mlirwith 11 test cases covering all patterns, chain optimization, divf exclusion, and pass-through of non-f32 opsmulf+addfwith bf16-emulation producesaievec.mac_elem(bf16 inputs, f32 accumulator)🤖 Generated with Claude Code