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Patch attiny85 PCMSK register#131

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Rahix merged 2 commits into
Rahix:mainfrom
mgrunwald:patch_attiny85_pcmsk
Nov 16, 2023
Merged

Patch attiny85 PCMSK register#131
Rahix merged 2 commits into
Rahix:mainfrom
mgrunwald:patch_attiny85_pcmsk

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@mgrunwald

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Fix #130 by adding fields for pins where the pin change interrupt can be enabled. I.e. it is possible to use this

self.exint.pcmsk.modify(|_, w| w.pcint0().set_bit());

instead of this:

self.exint.pcmsk.modify(|_, w| w.bits(1));

Since the two most significant bits of PCMSK on the attiny85 are reserved, it would make sense to change the write constraint to [0, 63], but I failed to achieve this. the code is commented in commit 78b331f . Because of this, the PR is still a draft.

@Rahix Rahix force-pushed the patch_attiny85_pcmsk branch from 78b331f to d1f7f93 Compare November 16, 2023 23:44

@Rahix Rahix left a comment

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Hi,

I'm so sorry for loosing track of this :( Thanks a lot again for your work here! It's looking great already. The write-constraint thing is something I'm afraid we'll have to keep as it is for now. This will be fixed as soon as we upgrade to a newer svdtools I believe.

Comment thread patch/attiny85.yaml
Comment on lines +102 to +105
# This doesn't work:
# _modify:
# PCMSK:
# _write_constraint: [0, 63]

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Yeah, the version of svdtools which we are using at the moment doesn't seem to support updating the write constraint of whole registers :/

Let's keep it the way you wrote it so we can uncomment the block once we upgrade to a version of svdtools that does support it.

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attiny_hal::pac::exint::pcmsk::W missing BitWriterRaw implementation?

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