[M308] tune silu&act

[zufayu]

Motivation

tune silu&act

Technical Details

Vectorized loads and stores combined with the packed multiply path

Test Result

~10% performace for act_and_mul_kernel in F16 datatype
~peak mem r/w increase from 2.5 to 2.8 TB/s

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

[Copilot]

Pull Request Overview

This PR optimizes the SiLU and activation kernels for AMD GPUs by implementing vectorized memory operations and packed multiplication instructions, achieving approximately 10% performance improvement for the act_and_mul_kernel in FP16 datatype with peak memory bandwidth increasing from 2.5 to 2.8 TB/s.

Key Changes:

• Implemented vectorized stores using segmented buffer writes for non-power-of-2 vector sizes
• Added packed multiplication path using v_pk_mul_f32 inline assembly for processing two elements simultaneously
• Added separate read/write bandwidth metrics to performance tests for better analysis

Reviewed Changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated 2 comments.

File	Description
op_tests/test_activation.py	Added separate read (RD TB/s) and write (WR TB/s) bandwidth metrics to both test functions for more granular performance analysis
csrc/kernels/activation_kernels.cu	Optimized act_and_mul_kernel with vectorized stores and packed multiply operations; added minimum vec_size constraint of 2; improved code formatting consistency

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[valarLip]

LGTM