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cpu/sam0_common: enable static voltages #21555

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Merged
merged 3 commits into from
Jun 23, 2025
Merged

cpu/sam0_common: enable static voltages #21555

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3c74301
cpu/sam0_common/periph/dac.c: dont use DAC_CTRLA_SWRST
HendrikVE Jun 20, 2025
4af71d9
cpu/sam0_common/periph/dac.c: add option to keep DAC running in standby
HendrikVE Jun 20, 2025
b157d5c
cpu/sam0_common/periph/dac.c: do conversion refresh by default
HendrikVE Jun 20, 2025
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36 changes: 32 additions & 4 deletions cpu/sam0_common/periph/dac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,14 @@

#define DAC_VAL(in) (in >> (16 - DAC_RES_BITS))

#ifndef CONFIG_SAM0_DAC_REFRESH
#define CONFIG_SAM0_DAC_REFRESH 2
#endif

#ifndef CONFIG_SAM0_DAC_RUN_ON_STANDBY
#define CONFIG_SAM0_DAC_RUN_ON_STANDBY 0
#endif

static void _dac_init_clock(dac_t line)
{
sam0_gclk_enable(DAC_CLOCK);
Expand Down Expand Up @@ -110,13 +118,29 @@

_dac_init_clock(line);

/* Settings can only be changed when DAC is disabled, reset config */
DAC->CTRLA.reg = DAC_CTRLA_SWRST;
/* Settings can only be changed when DAC is disabled */
DAC->CTRLA.reg &= ~DAC_CTRLA_ENABLE;
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@benpicco benpicco Jun 20, 2025

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Since there are only two bits, you could also just

Suggested change
DAC->CTRLA.reg &= ~DAC_CTRLA_ENABLE;
DAC->CTRLA.reg = 0;

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@HendrikVE HendrikVE Jun 20, 2025

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For some CPUs there are three bits. One of them is the bit to enable operation during standby power mode:

typedef union {
  struct {
    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby                     */
    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
  } bit;                       /*!< Structure used for bit  access                  */
  uint8_t reg;                 /*!< Type      used for register access              */
} DAC_CTRLA_Type;

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@benpicco benpicco Jun 20, 2025

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But now you are writing the entire CTRLA reg anyway at the end, you might as well set it all to 0 here 😉

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@HendrikVE HendrikVE Jun 20, 2025

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But 0 feels like a magic number to me and I like the fact that clearing the bit makes the intention clear.

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@benpicco benpicco Jun 20, 2025 •
edited
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Well it saves two instructions - but yea, not really that much relevant on init.

_sync();

#ifdef DAC_DACCTRL_ENABLE
DAC->DACCTRL[line].reg = DAC_DACCTRL_ENABLE
| _get_CCTRL(sam0_gclk_freq(DAC_CLOCK));
| _get_CCTRL(sam0_gclk_freq(DAC_CLOCK))
#endif
#if CONFIG_SAM0_DAC_RUN_ON_STANDBY && defined(DAC_DACCTRL_RUNSTDBY)
| DAC_DACCTRL_RUNSTDBY
#endif
;

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#ifdef DAC_DACCTRL_REFRESH
/** The DAC can only maintain its output on the desired value for approximately 100 μs.
* For static voltages the conversion must be refreshed periodically (see e.g.
* '47.6.9.3 Conversion Refresh' in the SAM D5xE5x family data sheet).
*
* Note: T_REFRESH = REFRESH * T_OSCULP32K
*/
static_assert(CONFIG_SAM0_DAC_REFRESH != 1, "DACCTRLx.REFRESH = 1 is reserved");

DAC->DACCTRL[line].bit.REFRESH = CONFIG_SAM0_DAC_REFRESH;
#endif

/* Set Reference Voltage & enable Output if needed */
Expand All @@ -124,9 +148,13 @@
#ifdef DAC_CTRLB_EOEN
| DAC_CTRLB_EOEN
#endif
;

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DAC->CTRLA.reg = DAC_CTRLA_ENABLE;
DAC->CTRLA.reg = DAC_CTRLA_ENABLE
#if CONFIG_SAM0_DAC_RUN_ON_STANDBY && defined(DAC_CTRLA_RUNSTDBY)
| DAC_CTRLA_RUNSTDBY
#endif
;

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_sync();

#ifdef DAC_STATUS_READY
Expand Down
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