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Replace plat::bfloat16 phi::dtype::bfloat16 in paddle/fluid/operators #63673

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Merged
luotao1 merged 1 commit into from
Apr 19, 2024
Merged

Replace plat::bfloat16 phi::dtype::bfloat16 in paddle/fluid/operators #63673

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1 change: 0 additions & 1 deletion paddle/fluid/operators/beam_search_decode_op_xpu.cc
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Expand Up @@ -111,7 +111,6 @@ class BeamSearchDecodeXPUKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(beam_search_decode,
XPU,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/alltoall_op.cc
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Expand Up @@ -65,7 +65,6 @@ Scatter tensors from all participators to all participators.
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(alltoall,
ops::AllToAllBaseOp,
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3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/alltoall_op.cu.cc
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Expand Up @@ -139,7 +139,6 @@ class AllToAllOpCUDAKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(alltoall,
GPU,
Expand All @@ -148,7 +147,7 @@ PD_REGISTER_STRUCT_KERNEL(alltoall,
float,
double,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
int,
int64_t,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/barrier_op.cc
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Expand Up @@ -41,7 +41,6 @@ Barrier Operator - Barrier among all participators.)DOC");
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(barrier, ops::BarrierOp, ops::BarrierOpMaker);

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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/barrier_op.cu.cc
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Expand Up @@ -92,7 +92,6 @@ class BarrierOpCUDAKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(
barrier, GPU, ALL_LAYOUT, ops::BarrierOpCUDAKernel, int) {}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allgather_op.cc
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Expand Up @@ -68,7 +68,6 @@ reference: https://docs.nvidia.com/deeplearning/sdk/nccl-developer-guide/docs/us
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allgather,
ops::CAllGatherOp,
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3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_allgather_op.cu.cc
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Expand Up @@ -122,7 +122,6 @@ class CAllGatherOpCUDAKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allgather,
GPU,
Expand All @@ -131,7 +130,7 @@ PD_REGISTER_STRUCT_KERNEL(c_allgather,
float,
double,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
int,
uint8_t,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allgather_op_xpu.cc
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Expand Up @@ -116,7 +116,6 @@ class CAllGatherOpXPUKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allgather,
XPU,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_avg_op.cc
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Expand Up @@ -37,7 +37,6 @@ DECLARE_INPLACE_OP_INFERER(AllreduceAvgInplaceInferer, {"X", "Out"});
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allreduce_avg,
ops::CAllReduceOp,
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3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_allreduce_avg_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_ALLREDUCE_CUDA_KERNEL(CAllReduceAvg, kRedAvg)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_avg,
GPU,
Expand All @@ -32,4 +31,4 @@ PD_REGISTER_STRUCT_KERNEL(c_allreduce_avg,
int,
int64_t,
phi::dtype::float16,
plat::bfloat16) {}
phi::dtype::bfloat16) {}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_max_op.cc
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Expand Up @@ -41,7 +41,6 @@ DEFINE_C_ALLREDUCE_CPU_KERNEL(CAllReduceMax, kRedMax)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allreduce_max,
ops::CAllReduceOp,
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3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_allreduce_max_op.cu.cc
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Expand Up @@ -21,15 +21,14 @@ DEFINE_C_ALLREDUCE_CUDA_KERNEL(CAllReduceMax, kRedMax)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_max,
GPU,
ALL_LAYOUT,
ops::CAllReduceMaxCUDAKernel,
float,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
double,
int,
Expand Down
2 changes: 1 addition & 1 deletion paddle/fluid/operators/collective/c_allreduce_max_op_xpu.cc
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Expand Up @@ -21,7 +21,7 @@ DEFINE_C_ALLREDUCE_XPU_KERNEL(CAllReduceMax, kRedMax)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_max,
XPU,
ALL_LAYOUT,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_min_op.cc
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Expand Up @@ -41,7 +41,6 @@ DEFINE_C_ALLREDUCE_CPU_KERNEL(CAllReduceMin, kRedMin)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allreduce_min,
ops::CAllReduceOp,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_min_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_ALLREDUCE_CUDA_KERNEL(CAllReduceMin, kRedMin)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_min,
GPU,
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2 changes: 1 addition & 1 deletion paddle/fluid/operators/collective/c_allreduce_min_op_xpu.cc
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Expand Up @@ -21,7 +21,7 @@ DEFINE_C_ALLREDUCE_XPU_KERNEL(CAllReduceMin, kRedMin)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_min,
XPU,
ALL_LAYOUT,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_prod_op.cc
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Expand Up @@ -41,7 +41,6 @@ DEFINE_C_ALLREDUCE_CPU_KERNEL(CAllReduceProd, kRedProd)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allreduce_prod,
ops::CAllReduceOp,
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1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_prod_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_ALLREDUCE_CUDA_KERNEL(CAllReduceProd, kRedProd)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_prod,
GPU,
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2 changes: 1 addition & 1 deletion paddle/fluid/operators/collective/c_allreduce_prod_op_xpu.cc
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Expand Up @@ -21,7 +21,7 @@ DEFINE_C_ALLREDUCE_XPU_KERNEL(CAllReduceProd, kRedProd)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_prod,
XPU,
ALL_LAYOUT,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_allreduce_sum_op.cc
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Expand Up @@ -62,7 +62,6 @@ DEFINE_C_ALLREDUCE_CPU_KERNEL(CAllReduceSum, kRedSum)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_allreduce_sum,
ops::CAllReduceOp,
Expand Down
3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_allreduce_sum_op.cu.cc
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Expand Up @@ -21,15 +21,14 @@ DEFINE_C_ALLREDUCE_CUDA_KERNEL(CAllReduceSum, kRedSum)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_sum,
GPU,
ALL_LAYOUT,
ops::CAllReduceSumCUDAKernel,
float,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
double,
int,
Expand Down
2 changes: 1 addition & 1 deletion paddle/fluid/operators/collective/c_allreduce_sum_op_xpu.cc
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Expand Up @@ -21,7 +21,7 @@ DEFINE_C_ALLREDUCE_XPU_KERNEL(CAllReduceSum, kRedSum)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_allreduce_sum,
XPU,
ALL_LAYOUT,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_broadcast_op.cc
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Expand Up @@ -59,7 +59,6 @@ Reference: https://docs.nvidia.com/deeplearning/sdk/nccl-developer-guide/docs/us
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_broadcast,
ops::CBroadcastOp,
Expand Down
3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_broadcast_op.cu.cc
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Expand Up @@ -90,7 +90,6 @@ class CBroadcastOpCUDAKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_broadcast,
GPU,
Expand All @@ -101,7 +100,7 @@ PD_REGISTER_STRUCT_KERNEL(c_broadcast,
float,
double,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
phi::dtype::float16) {
}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_broadcast_op_xpu.cc
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Expand Up @@ -129,7 +129,6 @@ class CBroadcastOpXPUKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_broadcast,
XPU,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_concat_op.cc
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Expand Up @@ -105,7 +105,6 @@ AllGather the tensors on different trainers and concat them along the last dimen
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OPERATOR(c_concat,
ops::CConcatOp,
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3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_concat_op.cu.cc
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Expand Up @@ -165,7 +165,6 @@ class CConcatOpCUDAKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_concat,
GPU,
Expand All @@ -176,7 +175,7 @@ PD_REGISTER_STRUCT_KERNEL(c_concat,
int,
int64_t,
#if NCCL_VERSION_CODE >= 21000 && CUDA_VERSION >= 11000
plat::bfloat16,
phi::dtype::bfloat16,
#endif
phi::dtype::float16) {
}
5 changes: 2 additions & 3 deletions paddle/fluid/operators/collective/c_concat_op_xpu.cc
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Expand Up @@ -160,7 +160,6 @@ class CConcatOpXPUKernel : public framework::OpKernel<T> {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_concat,
XPU,
Expand All @@ -169,5 +168,5 @@ PD_REGISTER_STRUCT_KERNEL(c_concat,
float,
int,
int64_t,
plat::float16,
plat::bfloat16) {}
phi::dtype::float16,
phi::dtype::bfloat16) {}
2 changes: 1 addition & 1 deletion paddle/fluid/operators/collective/c_embedding_op.cc
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Expand Up @@ -176,7 +176,7 @@ class CEmbeddingOpGradVarTypeInference : public framework::VarTypeInference {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OPERATOR(c_embedding,
ops::CEmbeddingOp,
ops::CEmbeddingOpMaker,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_avg_op.cc
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Expand Up @@ -37,7 +37,6 @@ class CReduceAvgOpMaker : public CReduceOpMaker {
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_reduce_avg,
ops::CReduceOp,
Expand Down
3 changes: 1 addition & 2 deletions paddle/fluid/operators/collective/c_reduce_avg_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_CUDA_KERNEL(CReduceAvg, kRedAvg);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_reduce_avg,
GPU,
Expand All @@ -32,4 +31,4 @@ PD_REGISTER_STRUCT_KERNEL(c_reduce_avg,
int,
int64_t,
phi::dtype::float16,
plat::bfloat16) {}
phi::dtype::bfloat16) {}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_max_op.cc
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Expand Up @@ -39,7 +39,6 @@ DEFINE_C_REDUCE_CPU_KERNEL(CReduceMax, kRedMax)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_reduce_max,
ops::CReduceOp,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_max_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_CUDA_KERNEL(CReduceMax, kRedMax);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_reduce_max,
GPU,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_max_op_xpu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_XPU_KERNEL(CReduceMax, kRedMax);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(
c_reduce_max, XPU, ALL_LAYOUT, ops::CReduceMaxXPUKernel, float) {}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_min_op.cc
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Expand Up @@ -38,7 +38,6 @@ DEFINE_C_REDUCE_CPU_KERNEL(CReduceMin, kRedMin)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_reduce_min,
ops::CReduceOp,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_min_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_CUDA_KERNEL(CReduceMin, kRedMin);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_reduce_min,
GPU,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_min_op_xpu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_XPU_KERNEL(CReduceMin, kRedMin);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(
c_reduce_min, XPU, ALL_LAYOUT, ops::CReduceMinXPUKernel, float) {}
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_prod_op.cc
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Expand Up @@ -39,7 +39,6 @@ DEFINE_C_REDUCE_CPU_KERNEL(CReduceProd, kRedProd)
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

REGISTER_OP_WITHOUT_GRADIENT(c_reduce_prod,
ops::CReduceOp,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_prod_op.cu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_CUDA_KERNEL(CReduceProd, kRedProd);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(c_reduce_prod,
GPU,
Expand Down
1 change: 0 additions & 1 deletion paddle/fluid/operators/collective/c_reduce_prod_op_xpu.cc
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Expand Up @@ -21,7 +21,6 @@ DEFINE_C_REDUCE_XPU_KERNEL(CReduceProd, kRedProd);
} // namespace paddle

namespace ops = paddle::operators;
namespace plat = paddle::platform;

PD_REGISTER_STRUCT_KERNEL(
c_reduce_prod, XPU, ALL_LAYOUT, ops::CReduceProdXPUKernel, float) {}
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