Cherry-pick from 16837 & 16846 to 1.4

paddle/fluid/inference/anakin/convert/activation.cc

@@ -43,47 +43,22 @@ void ActivationOpConverter<TargetT, PrecisionT>::operator()(
   auto output_name = op_desc.Output("Out").front();
   this->engine_->AddOp(op_name, "Activation", {input_name}, {output_name});
   this->engine_->AddOpAttr(op_name, "type", anakin_op_type_);
+
+  if (op_type_ == "swish") {
+    float beta = boost::get<float>(op_desc.GetAttr("beta"));
+    this->engine_->AddOpAttr(op_name, "clip_relu_num", beta);
+  }
+  if (op_type_ == "relu6") {
+    float threshold = boost::get<float>(op_desc.GetAttr("threshold"));
+    this->engine_->AddOpAttr(op_name, "clip_relu_num", threshold);
+  }
 }
 
 }  // namespace anakin
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using sigmoid_nv_fp32 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using sigmoid_nv_int8 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-using tanh_nv_fp32 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::FP32>;
-using tanh_nv_int8 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_nv_int8);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(tanh, tanh_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(tanh, tanh_nv_int8);
-#endif
-
-using sigmoid_cpu_fp32 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using sigmoid_cpu_int8 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-using tanh_cpu_fp32 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::FP32>;
-using tanh_cpu_int8 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_cpu_int8);
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(tanh, tanh_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(tanh, tanh_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(sigmoid, SigmoidOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(tanh, TanhOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(swish, SwishOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(relu6, Relu6OpConverter);

paddle/fluid/inference/anakin/convert/activation.h

@@ -37,7 +37,9 @@ class ActivationOpConverter : public AnakinOpConverter<TargetT, PrecisionT> {
   std::string op_type_;
   std::string anakin_op_type_;
   std::map<std::string, std::string> anakin_op_types_{{"tanh", "TanH"},
-                                                      {"sigmoid", "Sigmoid"}};
+                                                      {"sigmoid", "Sigmoid"},
+                                                      {"relu6", "ClippedRelu"},
+                                                      {"swish", "Swish"}};
 };
 
 template <typename TargetT, ::anakin::Precision PrecisionT>
@@ -52,6 +54,19 @@ class SigmoidOpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
   SigmoidOpConverter()
       : ActivationOpConverter<TargetT, PrecisionT>("sigmoid") {}
 };
+
+template <typename TargetT, ::anakin::Precision PrecisionT>
+class Relu6OpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
+ public:
+  Relu6OpConverter() : ActivationOpConverter<TargetT, PrecisionT>("relu6") {}
+};
+
+template <typename TargetT, ::anakin::Precision PrecisionT>
+class SwishOpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
+ public:
+  SwishOpConverter() : ActivationOpConverter<TargetT, PrecisionT>("swish") {}
+};
+
 }  // namespace anakin
 }  // namespace inference
 }  // namespace paddle

paddle/fluid/inference/anakin/convert/affine_channel.cc

@@ -52,22 +52,4 @@ void AffineChannelOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using affine_channel_nv_fp32 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using affine_channel_nv_int8 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_nv_int8);
-#endif
-
-using affine_channel_cpu_fp32 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using affine_channel_cpu_int8 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(affine_channel, AffineChannelOpConverter);

paddle/fluid/inference/anakin/convert/batch_norm.cc

@@ -82,18 +82,4 @@ void BatchNormOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using bn_nv_fp32 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using bn_nv_int8 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(batch_norm, bn_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(batch_norm, bn_nv_int8);
-#endif
-
-using bn_cpu_fp32 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using bn_cpu_int8 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(batch_norm, bn_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(batch_norm, bn_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(batch_norm, BatchNormOpConverter);

paddle/fluid/inference/anakin/convert/concat.cc

@@ -38,22 +38,4 @@ void ConcatOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using concat_nv_fp32 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::FP32>;
-using concat_nv_int8 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(concat, concat_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(concat, concat_nv_int8);
-
-#endif
-using concat_cpu_fp32 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::FP32>;
-using concat_cpu_int8 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(concat, concat_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(concat, concat_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(concat, ConcatOpConverter);

paddle/fluid/inference/anakin/convert/conv2d.cc

@@ -105,22 +105,4 @@ void Conv2dOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using conv2d_nv_fp32 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::FP32>;
-using conv2d_nv_int8 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(conv2d, conv2d_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(conv2d, conv2d_nv_int8);
-#endif
-
-using conv2d_cpu_fp32 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::FP32>;
-using conv2d_cpu_int8 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(conv2d, conv2d_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(conv2d, conv2d_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(conv2d, Conv2dOpConverter);

paddle/fluid/inference/anakin/convert/conv2d_fusion.cc

@@ -111,22 +111,4 @@ void Conv2dFusionOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using conv2d_fusion_nv_fp32 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using conv2d_fusion_nv_int8 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_nv_int8);
-#endif
-using conv2d_fusion_cpu_fp32 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using conv2d_fusion_cpu_int8 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(conv2d_fusion, Conv2dFusionOpConverter);

paddle/fluid/inference/anakin/convert/density_prior_box.cc

@@ -108,25 +108,5 @@ void DensityPriorBoxOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using ds_pr_nv_fp32 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using ds_pr_nv_int8 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_nv_fp32);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(prior_box, ds_pr_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_nv_int8);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(prior_box, ds_pr_nv_int8);
-#endif
-
-using ds_pr_cpu_fp32 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using ds_pr_cpu_int8 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_cpu_fp32);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(prior_box, ds_pr_cpu_fp32);
-
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_cpu_int8);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(prior_box, ds_pr_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(density_prior_box, DensityPriorBoxOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(prior_box, DensityPriorBoxOpConverter);

paddle/fluid/inference/anakin/convert/detection_out.cc

@@ -66,22 +66,4 @@ void DetectionOutOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using detection_out_nv_fp32 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using detection_out_nv_int8 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(detection_out, detection_out_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(detection_out, detection_out_nv_int8);
-#endif
-
-using detection_out_cpu_fp32 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using detection_out_cpu_int8 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(detection_out, detection_out_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(detection_out, detection_out_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(detection_out, DetectionOutOpConverter);

paddle/fluid/inference/anakin/convert/dropout.cc

@@ -52,22 +52,4 @@ void DropoutOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using dropout_nv_fp32 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using dropout_nv_int8 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(dropout, dropout_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(dropout, dropout_nv_int8);
-#endif
-
-using dropout_cpu_fp32 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using dropout_cpu_int8 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(dropout, dropout_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(dropout, dropout_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(dropout, DropoutOpConverter);

paddle/fluid/inference/anakin/convert/elementwise.cc

@@ -71,32 +71,5 @@ void ElementwiseMulOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using elet_nv_fp32 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using elet_nv_int8 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-using eletmul_nv_fp32 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using eletmul_nv_int8 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(elementwise_add, elet_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(elementwise_add, elet_nv_int8);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_nv_int8);
-
-#endif
-using elet_cpu_fp32 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using elet_cpu_int8 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-using eletmul_cpu_fp32 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using eletmul_cpu_int8 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(elementwise_add, elet_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(elementwise_add, elet_cpu_int8);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(elementwise_add, ElementwiseAddOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(elementwise_mul, ElementwiseMulOpConverter);

paddle/fluid/inference/anakin/convert/fc.cc

@@ -117,40 +117,5 @@ void FcBaseOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using mul_nv_fp32 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::FP32>;
-using fc_nv_fp32 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::NV,
-                                               ::anakin::Precision::FP32>;
-using mul_nv_int8 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::INT8>;
-using fc_nv_int8 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::NV,
-                                               ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(mul, mul_nv_fp32);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(fc, fc_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(mul, mul_nv_int8);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(fc, fc_nv_int8);
-#endif
-
-using mul_cpu_fp32 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::FP32>;
-using fc_cpu_fp32 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::X86,
-                                               ::anakin::Precision::FP32>;
-using mul_cpu_int8 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::INT8>;
-using fc_cpu_int8 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::X86,
-                                               ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(mul, mul_cpu_fp32);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(fc, fc_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(mul, mul_cpu_int8);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(fc, fc_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(mul, MulOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(fc, FcOpConverter);

paddle/fluid/inference/anakin/convert/flatten.cc

@@ -45,22 +45,4 @@ void FlattenOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using flatten_nv_fp32 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using flatten_nv_int8 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(flatten, flatten_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(flatten, flatten_nv_int8);
-#endif
-using flatten_cpu_fp32 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using flatten_cpu_int8 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(flatten, flatten_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(flatten, flatten_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(flatten, FlattenOpConverter);