[ARM]add armv7 fp16 op conv5x5s1 conv5x5s2 conv3x3s2_direct#8124
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chenjiaoAngel merged 10 commits intoPaddlePaddle:developfrom Jan 4, 2022
Merged
[ARM]add armv7 fp16 op conv5x5s1 conv5x5s2 conv3x3s2_direct#8124chenjiaoAngel merged 10 commits intoPaddlePaddle:developfrom
chenjiaoAngel merged 10 commits intoPaddlePaddle:developfrom
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Thanks for your contribution! |
| #define INIT_FIRST \ | ||
| "2:\n" \ | ||
| "vld1.16 {d10-d13}, [%[wc0]]! @ load w0, w1\n" \ | ||
| "vld1.16 {d14-d15}, [%[wc0]]! @ load w2\n" \ |
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这两个指令可以插入几条其他指令,减少冲突
| #define INIT \ | ||
| "2:\n" \ | ||
| "vld1.16 {d10-d13}, [%[wc0]]! @ load w0, w1\n" \ | ||
| "vld1.16 {d14-d15}, [%[wc0]]! @ load w2\n" \ |
| "vld1.16 {d10-d13}, [%[wc0]]! @ load w0, w1\n" \ | ||
| "vld1.16 {d14-d15}, [%[wc0]]! @ load w2\n" \ | ||
| "vld1.16 {d16-d19}, [%[ptr_out0]]! @ load outr0\n" \ | ||
| "vld1.16 {d20-d23}, [%[ptr_out0]] @ load outr0\n" \ |
| "vmla.f16 q14, q7, d4[2] @ w0 * inr24\n" \ | ||
| "vmla.f16 q15, q7, d5[0] @ w0 * inr26\n" \ | ||
| "vld1.16 {d10-d13}, [%[wc0]]! @ load w5, to q7\n" /* mul r1, with*/ \ | ||
| "vld1.16 {d14-d15}, [%[wc0]]! @ load w5, to q7\n" /* mul r1, with*/ \ |
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| #define COMPUTE \ | ||
| "vld1.16 {d24-d25}, [%[bias]] \n" /* load bias to out00 */ \ | ||
| "vld1.16 {d0-d3}, [%[wc0]]! \n" /* load w0-w1 */ \ |
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3×3 s2 direct
5×5 depthwise