Custom OpenOCD source available here
| Folder | Content |
|---|---|
src/vp |
Source code of the virtual prototype, and scripts to run OpenOCD and GDB. src/vp/modules/jtag contains code and testbenches for the up-to-date JTAG interface. src/vp/modules/jtag_interface contains the code for the JTAG interface of the last semester project, it is only kept for reference. src/vp/modules/adv_debug_if contains Verilog code of the ADI. |
report |
Report source code |
notes |
Weekly meeting notes |
docs |
Additional, external documentation (FPGA, OR, ADI, course slides..) |
src/or1ksim |
Source code of an or1k simulator. We thought about using it for tests but it turns out it implements a GDB RSP server directly, so it's impossible to use it alongside OpenOCD. It turned out useless for this project |
src/or1k_programs |
Some programs to try GDB with |
- Antoine Colson's work on implementation a JTAG interface for the OR1200 CPU.
- OpenOCD User Docs. Click hyperlink "PDF" to download
- OpenOCD Dev Docs
- OpenRISC ork1sim simulator. A C simulator for OR1200 processor featuring a server which GDB can connect to for debugging.
- GDB RSP protocol packet list
- Debugging or1k on FPGAs using GDB, a tutorial on how to hook OpenOCD onto a or1k target CPU when placed on a FPGA
- Supported CPU configs for OpenOCD indicating JTAG TAP controlers supported by the CPU debugging tools of OpenOCD