[action] [PR:24198] Keep eth1 in lanemap.ini and coreportindexmap.ini for UT2 because there is no midplane intf#1702
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mssonicbld merged 1 commit intoAzure:202503from Oct 9, 2025
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…re is no midplane intf
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#### Why I did it
The previous makefile ignored eth1 for UT2 which caused the first asic of ut2 short of interfaces
##### Work item tracking
- Microsoft ADO **(number only)**:
#### How I did it
Skip the incrementing of i when the disaggregated_chassis=1 exists in platform_env.conf
#### How to verify it
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#### Which release branch to backport (provide reason below if selected)
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- [x] 202006
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- [ ] 202205
- [ ] 202211
- [ ] 202305
- [ ] 202311
- [ ] 202405
- [ ] 202411
- [x] 202503
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- [ ] <!-- image version 2 -->
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Original PR: sonic-net/sonic-buildimage#24198 |
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…tically (#25480) #### Why I did it src/sonic-sairedis ``` * 14db8ad4 - (HEAD -> 202505, origin/202505) Add PORT_SERDES_ATTR flex counter support (Azure#1702) (4 days ago) [Dhanasekar Rathinavel] ``` #### How I did it #### How to verify it #### Description for the changelog
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Why I did it
The previous makefile ignored eth1 for UT2 which caused the first asic of ut2 short of interfaces
Work item tracking
How I did it
Skip the incrementing of i when the disaggregated_chassis=1 exists in platform_env.conf
How to verify it
Which release branch to backport (provide reason below if selected)
Tested branch (Please provide the tested image version)
Description for the changelog
Link to config_db schema for YANG module changes
A picture of a cute animal (not mandatory but encouraged)