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roma-jamJosuah Demangeon
roma-jam
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Josuah Demangeon
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drivers: usb: uhc: Added dwc2 initial files
Added placeholder driver API functions and minimal quirks handling for ESP32-S3, with support for the shell sample. Signed-off-by: Roman Leonov <[email protected]>
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‎drivers/usb/uhc/CMakeLists.txt‎

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# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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zephyr_library_include_directories(${ZEPHYR_BASE}/drivers/usb/common/)
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zephyr_library_sources(uhc_common.c)
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zephyr_library_sources_ifdef(CONFIG_UHC_DWC2 uhc_dwc2.c)
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zephyr_library_sources_ifdef(CONFIG_UHC_MAX3421E uhc_max3421e.c)
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zephyr_library_sources_ifdef(CONFIG_UHC_VIRTUAL uhc_virtual.c)
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zephyr_library_sources_ifdef(CONFIG_UHC_NXP_EHCI uhc_mcux_common.c uhc_mcux_ehci.c)

‎drivers/usb/uhc/Kconfig‎

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@@ -36,6 +36,7 @@ module = UHC_DRIVER
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module-str = uhc drv
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source "subsys/logging/Kconfig.template.log_config"
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source "drivers/usb/uhc/Kconfig.dwc2"
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source "drivers/usb/uhc/Kconfig.max3421e"
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source "drivers/usb/uhc/Kconfig.virtual"
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source "drivers/usb/uhc/Kconfig.mcux"

‎drivers/usb/uhc/Kconfig.dwc2‎

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# Copyright (c) 2026 Roman Leonov <[email protected]>
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# SPDX-License-Identifier: Apache-2.0
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config UHC_DWC2
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bool "DWC2 USB device controller driver"
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depends on DT_HAS_SNPS_DWC2_ENABLED
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default y
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select EVENTS
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help
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DWC2 USB host controller driver.
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if UHC_DWC2
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config UHC_DWC2_STACK_SIZE
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int "UHC DWC2 driver thread stack size"
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depends on UHC_DWC2
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default 512
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help
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DWC2 driver thread stack size.
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config UHC_DWC2_THREAD_PRIORITY
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int "UHC DWC2 driver thread priority"
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depends on UHC_DWC2
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default 8
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help
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DWC2 driver thread priority.
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endif # UHC_DWC2

‎drivers/usb/uhc/uhc_dwc2.c‎

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/*
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* SPDX-FileCopyrightText: Copyright (c) 2026 Roman Leonov <[email protected]>
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* SPDX-FileCopyrightText: Copyright Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT snps_dwc2
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#include <stdint.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/usb/uhc.h>
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#include <zephyr/usb/usb_ch9.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(uhc_dwc2, CONFIG_UHC_DRIVER_LOG_LEVEL);
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#include <usb_dwc2_hw.h>
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#include "uhc_common.h"
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#define UHC_DWC2_CHAN_REG(base, chan_idx) \
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((struct usb_dwc2_host_chan *)(((mem_addr_t)(base)) + USB_DWC2_HCCHAR(chan_idx)))
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struct uhc_dwc2_config {
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/* Pointer to base address of DWC_OTG registers */
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struct usb_dwc2_reg *const base;
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/* Pointer to the stack used by the driver thread */
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k_thread_stack_t *stack;
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/* Size of the stack used by the driver thread */
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size_t stack_size;
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/* Sendor-specific structure */
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void *quirk_data;
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void (*irq_enable_func)(const struct device *const dev);
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void (*irq_disable_func)(const struct device *const dev);
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};
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struct uhc_dwc2_data {
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struct k_thread thread;
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struct k_event events;
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};
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#include "uhc_dwc2_vendor_quirks.h"
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/*
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* Event handling
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*/
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static void uhc_dwc2_isr_handler(const struct device *dev)
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{
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/* TODO: Interrupt handling */
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(void)uhc_dwc2_quirk_irq_clear(dev);
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}
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static void uhc_dwc2_thread(void *arg0, void *arg1, void *arg2)
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{
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const struct device *const dev = (const struct device *)arg0;
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struct uhc_dwc2_data *const priv = uhc_get_private(dev);
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uint32_t events;
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while (true) {
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events = k_event_wait_safe(&priv->events, UINT32_MAX, false, K_FOREVER);
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uhc_lock_internal(dev, K_FOREVER);
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/* TODO: handle port and channel events */
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(void)events;
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uhc_unlock_internal(dev);
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}
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}
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/*
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* Device driver API
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*/
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static int uhc_dwc2_lock(const struct device *const dev)
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{
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struct uhc_data *data = dev->data;
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return k_mutex_lock(&data->mutex, K_FOREVER);
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}
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static int uhc_dwc2_unlock(const struct device *const dev)
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{
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struct uhc_data *data = dev->data;
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return k_mutex_unlock(&data->mutex);
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}
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static int uhc_dwc2_sof_enable(const struct device *const dev)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_bus_suspend(const struct device *const dev)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_bus_reset(const struct device *const dev)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_bus_resume(const struct device *const dev)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_enqueue(const struct device *const dev, struct uhc_transfer *const xfer)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_dequeue(const struct device *const dev, struct uhc_transfer *const xfer)
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{
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LOG_WRN("%s has not been implemented", __func__);
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return -ENOSYS;
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}
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static int uhc_dwc2_preinit(const struct device *const dev)
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{
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const struct uhc_dwc2_config *const config = dev->config;
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struct uhc_dwc2_data *const priv = uhc_get_private(dev);
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int ret;
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ret = uhc_dwc2_quirk_preinit(dev);
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if (ret != 0) {
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return ret;
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}
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/*
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* TODO:
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* use devicetree to get GHWCFGn values and use them to determine the
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* number and type of configured endpoints in the hardware as in udc?
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*/
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k_thread_create(&priv->thread,
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config->stack,
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config->stack_size,
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uhc_dwc2_thread,
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(void *)dev, NULL, NULL,
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K_PRIO_COOP(CONFIG_UHC_DWC2_THREAD_PRIORITY),
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K_ESSENTIAL,
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K_NO_WAIT);
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k_thread_name_set(&priv->thread, dev->name);
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return 0;
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}
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static int uhc_dwc2_init(const struct device *const dev)
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{
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int ret;
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LOG_WRN("%s has not been implemented", __func__);
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ret = uhc_dwc2_quirk_init(dev);
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if (ret != 0) {
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return ret;
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}
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return -ENOSYS;
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}
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static int uhc_dwc2_enable(const struct device *const dev)
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{
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int ret;
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LOG_WRN("%s has not been implemented", __func__);
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ret = uhc_dwc2_quirk_pre_enable(dev);
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if (ret != 0) {
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return ret;
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}
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ret = uhc_dwc2_quirk_post_enable(dev);
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if (ret != 0) {
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return ret;
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}
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return -ENOSYS;
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}
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static int uhc_dwc2_disable(const struct device *const dev)
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{
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int ret;
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LOG_WRN("%s has not been implemented", __func__);
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ret = uhc_dwc2_quirk_disable(dev);
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if (ret != 0) {
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return ret;
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}
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return -ENOSYS;
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}
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static int uhc_dwc2_shutdown(const struct device *const dev)
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{
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int ret;
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LOG_WRN("%s has not been implemented", __func__);
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ret = uhc_dwc2_quirk_shutdown(dev);
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if (ret != 0) {
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return ret;
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}
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return -ENOSYS;
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}
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static const struct uhc_api uhc_dwc2_api = {
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/* Common */
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.lock = uhc_dwc2_lock,
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.unlock = uhc_dwc2_unlock,
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.init = uhc_dwc2_init,
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.enable = uhc_dwc2_enable,
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.disable = uhc_dwc2_disable,
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.shutdown = uhc_dwc2_shutdown,
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/* Bus related */
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.bus_reset = uhc_dwc2_bus_reset,
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.sof_enable = uhc_dwc2_sof_enable,
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.bus_suspend = uhc_dwc2_bus_suspend,
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.bus_resume = uhc_dwc2_bus_resume,
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/* EP related */
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.ep_enqueue = uhc_dwc2_enqueue,
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.ep_dequeue = uhc_dwc2_dequeue,
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};
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#define UHC_DWC2_DEVICE_DEFINE(n) \
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K_THREAD_STACK_DEFINE(uhc_dwc2_stack_##n, CONFIG_UHC_DWC2_STACK_SIZE); \
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UHC_DWC2_IRQ_DT_INST_DEFINE(n) \
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UHC_DWC2_QUIRK_DATA(n) \
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\
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static struct uhc_dwc2_data uhc_dwc2_priv_##n = { \
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.events = Z_EVENT_INITIALIZER(uhc_dwc2_priv_##n.events), \
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}; \
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\
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static struct uhc_data uhc_data_##n = { \
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.mutex = Z_MUTEX_INITIALIZER(uhc_data_##n.mutex), \
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.priv = &uhc_dwc2_priv_##n, \
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}; \
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\
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static const struct uhc_dwc2_config uhc_dwc2_config_##n = { \
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.base = (struct usb_dwc2_reg *)DT_INST_REG_ADDR(n), \
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.stack = uhc_dwc2_stack_##n, \
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.stack_size = K_THREAD_STACK_SIZEOF(uhc_dwc2_stack_##n), \
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.quirk_data = &uhc_dwc2_quirk_data_##n, \
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.irq_enable_func = uhc_dwc2_irq_enable_func_##n, \
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.irq_disable_func = uhc_dwc2_irq_disable_func_##n, \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, uhc_dwc2_preinit, NULL, &uhc_data_##n, \
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&uhc_dwc2_config_##n, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uhc_dwc2_api);
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DT_INST_FOREACH_STATUS_OKAY(UHC_DWC2_DEVICE_DEFINE)

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